Release 14.7 - xst P.20131013 (lin64)
Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.
--> 
Parameter TMPDIR set to xst/projnav.tmp


Total REAL time to Xst completion: 0.00 secs
Total CPU time to Xst completion: 0.14 secs
 
--> 
Parameter xsthdpdir set to xst


Total REAL time to Xst completion: 0.00 secs
Total CPU time to Xst completion: 0.14 secs
 
--> 
Reading design: AMC13_T2.prj

TABLE OF CONTENTS
  1) Synthesis Options Summary
  2) HDL Parsing
  3) HDL Elaboration
  4) HDL Synthesis
       4.1) HDL Synthesis Report
  5) Advanced HDL Synthesis
       5.1) Advanced HDL Synthesis Report
  6) Low Level Synthesis
  7) Partition Report
  8) Design Summary
       8.1) Primitive and Black Box Usage
       8.2) Device utilization summary
       8.3) Partition Resource Summary
       8.4) Timing Report
            8.4.1) Clock Information
            8.4.2) Asynchronous Control Signals Information
            8.4.3) Timing Summary
            8.4.4) Timing Details
            8.4.5) Cross Clock Domains Report


=========================================================================
*                      Synthesis Options Summary                        *
=========================================================================
---- Source Parameters
Input File Name                    : "AMC13_T2.prj"
Ignore Synthesis Constraint File   : NO

---- Target Parameters
Output File Name                   : "AMC13_T2"
Output Format                      : NGC
Target Device                      : xc6slx45t-2-fgg484

---- Source Options
Top Module Name                    : AMC13_T2
Automatic FSM Extraction           : YES
FSM Encoding Algorithm             : Auto
Safe Implementation                : No
FSM Style                          : LUT
RAM Extraction                     : Yes
RAM Style                          : Auto
ROM Extraction                     : Yes
Shift Register Extraction          : NO
ROM Style                          : Auto
Resource Sharing                   : YES
Asynchronous To Synchronous        : NO
Shift Register Minimum Size        : 2
Use DSP Block                      : Auto
Automatic Register Balancing       : No

---- Target Options
LUT Combining                      : Auto
Reduce Control Sets                : Auto
Add IO Buffers                     : YES
Global Maximum Fanout              : 100000
Add Generic Clock Buffer(BUFG)     : 16
Register Duplication               : YES
Optimize Instantiated Primitives   : NO
Use Clock Enable                   : Auto
Use Synchronous Set                : Auto
Use Synchronous Reset              : Auto
Pack IO Registers into IOBs        : Auto
Equivalent register Removal        : NO

---- General Options
Optimization Goal                  : Speed
Optimization Effort                : 1
Power Reduction                    : NO
Keep Hierarchy                     : Yes
Netlist Hierarchy                  : As_Optimized
RTL Output                         : Yes
Global Optimization                : AllClockNets
Read Cores                         : YES
Write Timing Constraints           : NO
Cross Clock Analysis               : NO
Hierarchy Separator                : /
Bus Delimiter                      : <>
Case Specifier                     : Maintain
Slice Utilization Ratio            : 100
BRAM Utilization Ratio             : 100
DSP48 Utilization Ratio            : 100
Auto BRAM Packing                  : NO
Slice Utilization Ratio Delta      : 5

=========================================================================


=========================================================================
*                          HDL Parsing                                  *
=========================================================================
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/ipbus_trans_decl.vhd" into library work
Parsing package <ipbus_trans_decl>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/ipbus_package.vhd" into library work
Parsing package <ipbus>.
Parsing VHDL file "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/s6link_gbe_tile.vhd" into library work
Parsing entity <S6Link_GbE_tile>.
Parsing architecture <RTL> of entity <s6link_gbe_tile>.
Parsing VHDL file "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/EthernetCRC.vhd" into library work
Parsing entity <EthernetCRC>.
Parsing architecture <Behavioral> of entity <ethernetcrc>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_tx_mux.vhd" into library work
Parsing entity <udp_tx_mux>.
Parsing architecture <rtl> of entity <udp_tx_mux>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_txtransactor_if_simple.vhd" into library work
Parsing entity <udp_txtransactor_if>.
Parsing architecture <simple> of entity <udp_txtransactor_if>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_status_buffer.vhd" into library work
Parsing entity <udp_status_buffer>.
Parsing architecture <rtl> of entity <udp_status_buffer>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_rxtransactor_if_simple.vhd" into library work
Parsing entity <udp_rxtransactor_if>.
Parsing architecture <simple> of entity <udp_rxtransactor_if>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_rxram_shim.vhd" into library work
Parsing entity <udp_rxram_shim>.
Parsing architecture <simple> of entity <udp_rxram_shim>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_rxram_mux.vhd" into library work
Parsing entity <udp_rxram_mux>.
Parsing architecture <rtl> of entity <udp_rxram_mux>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_rarp_block.vhd" into library work
Parsing entity <udp_rarp_block>.
Parsing architecture <rtl> of entity <udp_rarp_block>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_packet_parser.vhd" into library work
Parsing entity <udp_packet_parser>.
Parsing architecture <v3> of entity <udp_packet_parser>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_ipaddr_block.vhd" into library work
Parsing entity <udp_ipaddr_block>.
Parsing architecture <rtl> of entity <udp_ipaddr_block>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_dualportram_tx.vhd" into library work
Parsing entity <udp_DualPortRAM_tx>.
Parsing architecture <v3> of entity <udp_dualportram_tx>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_dualportram_rx.vhd" into library work
Parsing entity <udp_DualPortRAM_rx>.
Parsing architecture <striped> of entity <udp_dualportram_rx>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_dualportram.vhd" into library work
Parsing entity <udp_DualPortRAM>.
Parsing architecture <initial> of entity <udp_dualportram>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_do_rx_reset.vhd" into library work
Parsing entity <udp_do_rx_reset>.
Parsing architecture <rtl> of entity <udp_do_rx_reset>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_clock_crossing_if.vhd" into library work
Parsing entity <udp_clock_crossing_if>.
Parsing architecture <rtl> of entity <udp_clock_crossing_if>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_byte_sum.vhd" into library work
Parsing entity <udp_byte_sum>.
Parsing architecture <rtl> of entity <udp_byte_sum>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_build_status.vhd" into library work
Parsing entity <udp_build_status>.
Parsing architecture <rtl> of entity <udp_build_status>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_build_resend.vhd" into library work
Parsing entity <udp_build_resend>.
Parsing architecture <rtl> of entity <udp_build_resend>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_build_ping.vhd" into library work
Parsing entity <udp_build_ping>.
Parsing architecture <rtl> of entity <udp_build_ping>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_build_payload.vhd" into library work
Parsing entity <udp_build_payload>.
Parsing architecture <rtl> of entity <udp_build_payload>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_build_arp.vhd" into library work
Parsing entity <udp_build_arp>.
Parsing architecture <rtl> of entity <udp_build_arp>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_buffer_selector.vhd" into library work
Parsing entity <udp_buffer_selector>.
Parsing architecture <simple> of entity <udp_buffer_selector>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/transactor_sm.vhd" into library work
Parsing entity <transactor_sm>.
Parsing architecture <rtl> of entity <transactor_sm>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/transactor_if.vhd" into library work
Parsing entity <transactor_if>.
Parsing architecture <rtl> of entity <transactor_if>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/transactor_cfg.vhd" into library work
Parsing entity <transactor_cfg>.
Parsing architecture <rtl> of entity <transactor_cfg>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/clock_div.vhd" into library work
Parsing entity <clock_div>.
Parsing architecture <rtl> of entity <clock_div>.
Parsing VHDL file "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/soft_emac_AXI4.vhd" into library work
Parsing entity <soft_emac>.
Parsing architecture <Behavioral> of entity <soft_emac>.
Parsing VHDL file "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/s6link_gbe.vhd" into library work
Parsing entity <S6Link_GbE>.
Parsing architecture <RTL> of entity <s6link_gbe>.
Parsing VHDL file "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/amc13_pack.vhd" into library work
Parsing package <amc13_pack>.
Parsing package body <amc13_pack>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_if_flat.vhd" into library work
Parsing entity <UDP_if>.
Parsing architecture <flat> of entity <udp_if>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/trans_arb.vhd" into library work
Parsing entity <trans_arb>.
Parsing architecture <rtl> of entity <trans_arb>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/transactor.vhd" into library work
Parsing entity <transactor>.
Parsing architecture <rtl> of entity <transactor>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/stretcher.vhd" into library work
Parsing entity <stretcher>.
Parsing architecture <rtl> of entity <stretcher>.
Parsing VHDL file "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/trig_data.vhd" into library work
Parsing entity <trig_data>.
Parsing architecture <Behavioral> of entity <trig_data>.
Parsing VHDL file "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/T2_flash.vhd" into library work
Parsing entity <flash>.
Parsing architecture <Behavioral> of entity <flash>.
Parsing VHDL file "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/reboot.vhd" into library work
Parsing entity <reboot>.
Parsing architecture <Behavioral> of entity <reboot>.
Parsing VHDL file "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/GTP_if_AXI4.vhd" into library work
Parsing entity <GTP_if>.
Parsing architecture <Behavioral> of entity <gtp_if>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/SPI/SPI_if.vhd" into library work
Parsing entity <SPI_if>.
Parsing architecture <Behavioral> of entity <spi_if>.
Parsing VHDL file "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/ipbus_ctrl.vhd" into library work
Parsing entity <ipbus_ctrl>.
Parsing architecture <rtl> of entity <ipbus_ctrl>.
Parsing VHDL file "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" into library work
Parsing entity <AMC13_T2>.
Parsing architecture <Behavioral> of entity <amc13_t2>.
WARNING:HDLCompiler:946 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 622: Actual for formal port d0 is neither a static name nor a globally static expression
WARNING:HDLCompiler:946 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 623: Actual for formal port d1 is neither a static name nor a globally static expression
WARNING:HDLCompiler:946 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 689: Actual for formal port c1 is neither a static name nor a globally static expression
WARNING:HDLCompiler:946 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1295: Actual for formal port mac_addr is neither a static name nor a globally static expression

=========================================================================
*                            HDL Elaboration                            *
=========================================================================

Elaborating entity <AMC13_T2> (architecture <Behavioral>) from library <work>.
WARNING:HDLCompiler:871 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 357: Using initial value "00000000000000000000000000000000" for debug_in since it is never assigned
WARNING:HDLCompiler:871 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 423: Using initial value "00000000" for ttc_status since it is never assigned

Elaborating entity <SPI_if> (architecture <Behavioral>) from library <work>.
WARNING:HDLCompiler:634 - "/home/ise/D_DRIVE/amc13-firmware/src/common/SPI/SPI_if.vhd" Line 64: Net <STATUS[2]> does not have a driver.
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 713: brcst should be on the sensitivity list of the process

Elaborating entity <flash> (architecture <Behavioral>) from library <work>.
WARNING:HDLCompiler:1127 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/T2_flash.vhd" Line 84: Assignment to strobe_q ignored, since the identifier is never used

Elaborating entity <BRAM_TDP_MACRO> (architecture <bram_V>) with generics from library <unimacro>.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 878: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 890: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 905: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 926: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 234: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 303: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 316: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 577: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 374: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 385: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 465: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 476: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 499: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 553: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 945: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 628: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 630: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 687: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 709: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1009: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1111: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1238: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 740: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 741: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 762: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 772: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 791: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 801: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 820: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 830: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1430: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1431: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1432: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1433: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1434: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1451: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1452: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1453: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1454: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1455: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1472: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1491: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1510: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1535: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1561: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1571: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1572: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1579: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1589: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1590: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1597: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1613: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1933: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 2263: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:634 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1409: Net <dia_pattern[31]> does not have a driver.
WARNING:HDLCompiler:634 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1411: Net <dipa_pattern[3]> does not have a driver.
WARNING:HDLCompiler:634 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1412: Net <dipb_pattern[3]> does not have a driver.

Elaborating entity <BRAM_TDP_MACRO> (architecture <bram_V>) with generics from library <unimacro>.

Elaborating entity <GTP_if> (architecture <Behavioral>) from library <work>.

Elaborating entity <soft_emac> (architecture <Behavioral>) from library <work>.

Elaborating entity <EthernetCRC> (architecture <Behavioral>) from library <work>.
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/soft_emac_AXI4.vhd" Line 220: rx_crc_d should be on the sensitivity list of the process
WARNING:HDLCompiler:89 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/GTP_if_AXI4.vhd" Line 218: <gig_eth_pcs_pma_v11_1> remains a black-box since it has no binding entity.

Elaborating entity <S6Link_GbE> (architecture <RTL>) with generics from library <work>.
WARNING:HDLCompiler:1127 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/s6link_gbe.vhd" Line 309: Assignment to tied_to_ground_i ignored, since the identifier is never used
WARNING:HDLCompiler:1127 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/s6link_gbe.vhd" Line 311: Assignment to tied_to_vcc_i ignored, since the identifier is never used

Elaborating entity <S6Link_GbE_tile> (architecture <RTL>) with generics from library <work>.
WARNING:HDLCompiler:1127 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/s6link_gbe_tile.vhd" Line 225: Assignment to tied_to_vcc_vec_i ignored, since the identifier is never used
WARNING:HDLCompiler:1127 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/s6link_gbe_tile.vhd" Line 564: Assignment to rxchariscomma0_float_i ignored, since the identifier is never used
WARNING:HDLCompiler:1127 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/s6link_gbe_tile.vhd" Line 566: Assignment to rxchariscomma1_float_i ignored, since the identifier is never used
WARNING:HDLCompiler:1127 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/s6link_gbe_tile.vhd" Line 568: Assignment to rxcharisk0_float_i ignored, since the identifier is never used
WARNING:HDLCompiler:1127 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/s6link_gbe_tile.vhd" Line 570: Assignment to rxcharisk1_float_i ignored, since the identifier is never used
WARNING:HDLCompiler:1127 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/s6link_gbe_tile.vhd" Line 574: Assignment to rxdisperr0_float_i ignored, since the identifier is never used
WARNING:HDLCompiler:1127 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/s6link_gbe_tile.vhd" Line 576: Assignment to rxdisperr1_float_i ignored, since the identifier is never used
WARNING:HDLCompiler:1127 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/s6link_gbe_tile.vhd" Line 578: Assignment to rxnotintable0_float_i ignored, since the identifier is never used
WARNING:HDLCompiler:1127 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/s6link_gbe_tile.vhd" Line 580: Assignment to rxnotintable1_float_i ignored, since the identifier is never used
WARNING:HDLCompiler:1127 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/s6link_gbe_tile.vhd" Line 583: Assignment to rxrundisp1_float_i ignored, since the identifier is never used
WARNING:HDLCompiler:89 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 185: <linkfifo> remains a black-box since it has no binding entity.
WARNING:HDLCompiler:746 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 242: Range is empty (null range)
WARNING:HDLCompiler:746 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 243: Range is empty (null range)
WARNING:HDLCompiler:746 - "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/ipbus_ctrl.vhd" Line 60: Range is empty (null range)
WARNING:HDLCompiler:746 - "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/ipbus_ctrl.vhd" Line 61: Range is empty (null range)

Elaborating entity <ipbus_ctrl> (architecture <rtl>) with generics from library <work>.

Elaborating entity <UDP_if> (architecture <flat>) with generics from library <work>.

Elaborating entity <udp_ipaddr_block> (architecture <rtl>) from library <work>.

Elaborating entity <udp_rarp_block> (architecture <rtl>) from library <work>.

Elaborating entity <udp_build_arp> (architecture <rtl>) from library <work>.

Elaborating entity <udp_build_payload> (architecture <rtl>) from library <work>.

Elaborating entity <udp_build_ping> (architecture <rtl>) from library <work>.

Elaborating entity <udp_build_resend> (architecture <rtl>) from library <work>.

Elaborating entity <udp_build_status> (architecture <rtl>) from library <work>.

Elaborating entity <udp_status_buffer> (architecture <rtl>) with generics from library <work>.

Elaborating entity <udp_byte_sum> (architecture <rtl>) from library <work>.

Elaborating entity <udp_do_rx_reset> (architecture <rtl>) from library <work>.

Elaborating entity <udp_packet_parser> (architecture <v3>) with generics from library <work>.

Elaborating entity <udp_rxram_mux> (architecture <rtl>) from library <work>.

Elaborating entity <udp_DualPortRAM> (architecture <initial>) with generics from library <work>.

Elaborating entity <udp_buffer_selector> (architecture <simple>) with generics from library <work>.

Elaborating entity <udp_rxram_shim> (architecture <simple>) with generics from library <work>.

Elaborating entity <udp_DualPortRAM_rx> (architecture <striped>) with generics from library <work>.
INFO:HDLCompiler:679 - "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_dualportram_rx.vhd" Line 45. Case statement is complete. others clause is never selected

Elaborating entity <udp_buffer_selector> (architecture <simple>) with generics from library <work>.

Elaborating entity <udp_DualPortRAM_tx> (architecture <v3>) with generics from library <work>.

Elaborating entity <udp_rxtransactor_if> (architecture <simple>) from library <work>.

Elaborating entity <udp_tx_mux> (architecture <rtl>) from library <work>.

Elaborating entity <udp_txtransactor_if> (architecture <simple>) with generics from library <work>.

Elaborating entity <udp_clock_crossing_if> (architecture <rtl>) with generics from library <work>.

Elaborating entity <transactor> (architecture <rtl>) from library <work>.

Elaborating entity <transactor_if> (architecture <rtl>) from library <work>.

Elaborating entity <transactor_sm> (architecture <rtl>) from library <work>.

Elaborating entity <transactor_cfg> (architecture <rtl>) from library <work>.

Elaborating entity <stretcher> (architecture <rtl>) from library <work>.

Elaborating entity <clock_div> (architecture <rtl>) from library <work>.
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1308: ipb_master_out should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1309: ipb_master_out should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1314: ipb_master_out should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1315: ipb_master_out should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1316: ttc_history_do should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1317: ttc_history_do should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1318: ttc_history_do should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1319: ttc_history_do should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1321: ipb_master_out should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1322: buffer_do should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1323: ipb_master_out should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1324: twinmux_data should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1325: ipb_master_out should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1326: ipb_master_out should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1327: en_twinmux should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1328: delay_trig0 should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1329: delay_trig1 should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1330: delay_twinmux should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1331: delay_twinmux should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1332: delay_twinmux should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1333: delay_twinmux should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1334: delay_twinmux should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1335: delay_twinmux should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1336: delay_twinmux should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1337: delay_twinmux should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1338: delay_twinmux should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1339: delay_twinmux should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1340: delay_twinmux should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1341: delay_twinmux should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1344: ipb_master_out should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1345: ipb_master_out should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1346: sn should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1347: flash_busy should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1348: amc_en should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1349: v6_init_b should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1350: l1_reg should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1351: bcnt_reg should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1352: oc_reg should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1353: bcnterr_cnt should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1354: sinerr_cnt should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1355: dberr_cnt should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1356: l1a_cnt should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1357: bcnt should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1358: f_ttc should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1359: en_ttc_history should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1360: dna should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1361: dna should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1363: ipb_master_out should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1364: ttccmdcntr should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1365: ipb_master_out should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1366: cmd_list_sp should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1367: ipb_master_out should be on the sensitivity list of the process
WARNING:HDLCompiler:92 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 1368: ocnresetcmd should be on the sensitivity list of the process

Elaborating entity <reboot> (architecture <Behavioral>) from library <work>.

Elaborating entity <BRAM_SDP_MACRO> (architecture <bram_V>) with generics from library <unimacro>.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 286: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 299: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 313: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 321: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 351: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 374: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 712: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 750: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 762: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 777: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 798: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 816: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 458: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 648: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 685: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 398: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 429: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 226: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 250: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 490: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 503: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 513: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 533: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 547: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 549: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 569: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 583: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 585: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 604: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 617: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 627: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 629: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 963: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1029: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1168: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 845: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 854: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 895: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 904: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 871: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 880: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 943: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 952: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 919: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 928: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1353: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1354: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1355: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1356: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1357: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1358: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1364: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1378: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1379: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1380: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1381: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1382: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1383: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1389: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1402: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1419: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1449: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1458: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1472: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1473: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1485: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 2072: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 3352: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 3430: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:634 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1334: Net <dip_pattern[3]> does not have a driver.

Elaborating entity <BRAM_SDP_MACRO> (architecture <bram_V>) with generics from library <unimacro>.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 328: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 335: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 358: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 365: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 3508: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:634 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd" Line 1333: Net <di_pattern[15]> does not have a driver.

Elaborating entity <trig_data> (architecture <Behavioral>) from library <work>.

Elaborating entity <BRAM_TDP_MACRO> (architecture <bram_V>) with generics from library <unimacro>.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 247: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 408: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:321 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 658: Comparison between arrays of unequal length always returns FALSE.
WARNING:HDLCompiler:634 - "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd" Line 1410: Net <dib_pattern[31]> does not have a driver.
WARNING:HDLCompiler:634 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" Line 518: Net <buffer_di[31]> does not have a driver.

=========================================================================
*                           HDL Synthesis                               *
=========================================================================

Synthesizing Unit <AMC13_T2>.
    Related source file is "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd".
    Set property "IOB = TRUE" for signal <T3_SCK_o>.
WARNING:Xst:647 - Input <GPLED_B> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" line 553: Output port <SPI_wdata> of the instance <i_SPI_if> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" line 553: Output port <SPI_addr> of the instance <i_SPI_if> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" line 553: Output port <newIPADDR> of the instance <i_SPI_if> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" line 553: Output port <SPI_we> of the instance <i_SPI_if> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" line 1107: Output port <debug_out> of the instance <i_GTP_if> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" line 1107: Output port <LINKrxchariscomma> of the instance <i_GTP_if> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" line 1107: Output port <LINKpllLock> of the instance <i_GTP_if> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" line 1263: Output port <full> of the instance <i_LinkFIFO> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" line 1277: Output port <ipb_req> of the instance <i_ipbus> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" line 1277: Output port <pkt_rx> of the instance <i_ipbus> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" line 1277: Output port <pkt_tx> of the instance <i_ipbus> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" line 1277: Output port <pkt_rx_led> of the instance <i_ipbus> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" line 1277: Output port <pkt_tx_led> of the instance <i_ipbus> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/AMC13_T2_AXI4.vhd" line 1774: Output port <DOA> of the instance <i_buffer> is unconnected or connected to loadless signal.
WARNING:Xst:2935 - Signal 'buffer_di<31:30>', unconnected in block 'AMC13_T2', is tied to its initial value (00).
WARNING:Xst:2935 - Signal 'buffer_di<15:14>', unconnected in block 'AMC13_T2', is tied to its initial value (00).
    Found 1-bit register for signal <TTC_data<1>>.
    Found 1-bit register for signal <L1A>.
    Found 2-bit register for signal <load_DNA>.
    Found 24-bit register for signal <Event_nr>.
    Found 8-bit register for signal <BcntErr_cnt>.
    Found 8-bit register for signal <SinErr_cnt>.
    Found 8-bit register for signal <DbErr_cnt>.
    Found 16-bit register for signal <L1A_cnt>.
    Found 16-bit register for signal <BC0_cnt>.
    Found 16-bit register for signal <TTCcmdCntr<0>>.
    Found 16-bit register for signal <TTCcmdCntr<1>>.
    Found 16-bit register for signal <TTCcmdCntr<2>>.
    Found 16-bit register for signal <TTCcmdCntr<3>>.
    Found 16-bit register for signal <TTCcmdCntr<4>>.
    Found 16-bit register for signal <TTCcmdCntr<5>>.
    Found 16-bit register for signal <TTCcmdCntr<6>>.
    Found 16-bit register for signal <TTCcmdCntr<7>>.
    Found 16-bit register for signal <TTCcmdCntr<8>>.
    Found 16-bit register for signal <TTCcmdCntr<9>>.
    Found 16-bit register for signal <TTCcmdCntr<10>>.
    Found 16-bit register for signal <TTCcmdCntr<11>>.
    Found 16-bit register for signal <TTCcmdCntr<12>>.
    Found 16-bit register for signal <TTCcmdCntr<13>>.
    Found 16-bit register for signal <TTCcmdCntr<14>>.
    Found 16-bit register for signal <TTCcmdCntr<15>>.
    Found 12-bit register for signal <amc_en>.
    Found 6-bit register for signal <DNA_cntr>.
    Found 1-bit register for signal <shift_DNA>.
    Found 1-bit register for signal <TTCdata<2>>.
    Found 6-bit register for signal <rec_cntr>.
    Found 1-bit register for signal <rec_cmd>.
    Found 1-bit register for signal <FMT>.
    Found 13-bit register for signal <sr>.
    Found 8-bit register for signal <brcst_data>.
    Found 5-bit register for signal <brcst_syn>.
    Found 1-bit register for signal <frame_err>.
    Found 1-bit register for signal <brcst_str<2>>.
    Found 1-bit register for signal <brcst_str<0>>.
    Found 1-bit register for signal <single_err>.
    Found 1-bit register for signal <double_err>.
    Found 1-bit register for signal <SinErrStr>.
    Found 1-bit register for signal <DbErrStr>.
    Found 8-bit register for signal <Brcst>.
    Found 1-bit register for signal <OCntRes>.
    Found 1-bit register for signal <BCntRes>.
    Found 1-bit register for signal <EvCntRes>.
    Found 16-bit register for signal <L1_reg>.
    Found 12-bit register for signal <Bcnt_reg>.
    Found 32-bit register for signal <OC_reg>.
    Found 16-bit register for signal <inc_TTCcmdCntr>.
    Found 12-bit register for signal <Bcnt>.
    Found 32-bit register for signal <OC_cnt>.
    Found 1-bit register for signal <inh_conf>.
    Found 2-bit register for signal <V6_INIT_B_q>.
    Found 1-bit register for signal <en_conf>.
    Found 27-bit register for signal <conf_cntr>.
    Found 1-bit register for signal <M_Q>.
    Found 1-bit register for signal <FLASH_D>.
    Found 1-bit register for signal <V6_CDATA>.
    Found 1-bit register for signal <en_CCLK>.
    Found 1-bit register for signal <rst_CRC>.
    Found 1-bit register for signal <calc_CRC>.
    Found 24-bit register for signal <CRC>.
    Found 1-bit register for signal <FLASH_S>.
    Found 8-bit register for signal <GbErxd_q>.
    Found 1-bit register for signal <GbErxdvld_q>.
    Found 1-bit register for signal <GbErxgoodframe>.
    Found 1-bit register for signal <GbErxbadframe>.
    Found 1-bit register for signal <GbErxgoodframe_q>.
    Found 1-bit register for signal <GbErxbadframe_q>.
    Found 2-bit register for signal <LINKtxcharisk>.
    Found 16-bit register for signal <LINKtxdata>.
    Found 4-bit register for signal <div>.
    Found 1-bit register for signal <SN_high>.
    Found 1-bit register for signal <LinkFIFO_din<7>>.
    Found 1-bit register for signal <LinkFIFO_din<6>>.
    Found 1-bit register for signal <LinkFIFO_din<5>>.
    Found 1-bit register for signal <LinkFIFO_din<4>>.
    Found 1-bit register for signal <LinkFIFO_din<3>>.
    Found 1-bit register for signal <LinkFIFO_din<2>>.
    Found 1-bit register for signal <LinkFIFO_din<1>>.
    Found 1-bit register for signal <LinkFIFO_din<0>>.
    Found 1-bit register for signal <LINKrxcharisk1_q>.
    Found 8-bit register for signal <LINKrxdata_q>.
    Found 1-bit register for signal <RxV6cmd>.
    Found 3-bit register for signal <RxV6Cntr>.
    Found 1-bit register for signal <wr_amc_en>.
    Found 1-bit register for signal <rst_ipbus>.
    Found 1-bit register for signal <LinkFIFO_rst>.
    Found 1-bit register for signal <LinkFIFO_wep>.
    Found 1-bit register for signal <LinkFIFO_we>.
    Found 1-bit register for signal <sel_Link>.
    Found 4-bit register for signal <T3_L1A_sync>.
    Found 16-bit register for signal <T3_L1A_cnt>.
    Found 20-bit register for signal <ipbclk_cntr>.
    Found 4-bit register for signal <ipbclk_cntr19_sync>.
    Found 20-bit register for signal <TTC_cntr>.
    Found 20-bit register for signal <F_TTC>.
    Found 5-bit register for signal <DNA_div>.
    Found 1-bit register for signal <reset>.
    Found 1-bit register for signal <pulse>.
    Found 1-bit register for signal <clear_TTC_history>.
    Found 1-bit register for signal <reprogS6>.
    Found 1-bit register for signal <reprogV6>.
    Found 1-bit register for signal <clear_cmd_list>.
    Found 12-bit register for signal <amc_enp>.
    Found 1-bit register for signal <en_TTC_history>.
    Found 1-bit register for signal <en_TTC_filter>.
    Found 16-bit register for signal <OcNresetCmd>.
    Found 1-bit register for signal <catch_twinmux>.
    Found 1-bit register for signal <en_twinmux>.
    Found 8-bit register for signal <delay_TRIG0>.
    Found 8-bit register for signal <delay_TRIG1>.
    Found 8-bit register for signal <delay_twinmux<0>>.
    Found 8-bit register for signal <delay_twinmux<1>>.
    Found 8-bit register for signal <delay_twinmux<2>>.
    Found 8-bit register for signal <delay_twinmux<3>>.
    Found 8-bit register for signal <delay_twinmux<4>>.
    Found 8-bit register for signal <delay_twinmux<5>>.
    Found 8-bit register for signal <delay_twinmux<6>>.
    Found 8-bit register for signal <delay_twinmux<7>>.
    Found 8-bit register for signal <delay_twinmux<8>>.
    Found 8-bit register for signal <delay_twinmux<9>>.
    Found 8-bit register for signal <delay_twinmux<10>>.
    Found 8-bit register for signal <delay_twinmux<11>>.
    Found 1-bit register for signal <reprogS6_dl<3>>.
    Found 1-bit register for signal <reprogS6_dl<2>>.
    Found 1-bit register for signal <reprogS6_dl<1>>.
    Found 1-bit register for signal <rebootS6>.
    Found 57-bit register for signal <DNA>.
    Found 8-bit register for signal <TTC_CMD>.
    Found 32-bit register for signal <TTC_OrN>.
    Found 12-bit register for signal <TTC_BcN>.
    Found 24-bit register for signal <TTC_EvN>.
    Found 1-bit register for signal <chk_cmd_list>.
    Found 4-bit register for signal <cmd_list_ra>.
    Found 1-bit register for signal <TTC_history_we>.
    Found 76-bit register for signal <TTC_history_di>.
    Found 4-bit register for signal <cmd_list_wap>.
    Found 9-bit register for signal <TTC_history_wa>.
    Found 1-bit register for signal <TTC_history_full>.
    Found 3-bit register for signal <catch_twinmuxSync>.
    Found 4-bit register for signal <buffer_we>.
    Found 1-bit register for signal <en_trig>.
    Found 9-bit register for signal <buffer_wa>.
    Found 1-bit register for signal <TTCclk_toggle_q>.
    Found 3-bit register for signal <TTCclkPhase>.
    Found 1-bit register for signal <T3_SCK_o>.
    Found 1-bit register for signal <TTCclk_toggle>.
    Found 1-bit register for signal <clk_toggle>.
    Found 1-bit register for signal <clk_toggle_q>.
    Found 4-bit register for signal <twinmux_web>.
    Found 1-bit register for signal <TTCdata<3>>.
    Found 6-bit adder for signal <rec_cntr[5]_GND_11_o_add_3_OUT> created at line 718.
    Found 12-bit adder for signal <Bcnt[11]_GND_11_o_add_43_OUT> created at line 811.
    Found 32-bit adder for signal <OC_cnt[31]_GND_11_o_add_46_OUT> created at line 816.
    Found 24-bit adder for signal <Event_nr[23]_GND_11_o_add_51_OUT> created at line 834.
    Found 8-bit adder for signal <BcntErr_cnt[7]_GND_11_o_add_56_OUT> created at line 837.
    Found 8-bit adder for signal <SinErr_cnt[7]_GND_11_o_add_59_OUT> created at line 840.
    Found 8-bit adder for signal <DbErr_cnt[7]_GND_11_o_add_62_OUT> created at line 843.
    Found 16-bit adder for signal <L1A_cnt[15]_GND_11_o_add_64_OUT> created at line 846.
    Found 16-bit adder for signal <BC0_cnt[15]_GND_11_o_add_66_OUT> created at line 849.
    Found 16-bit adder for signal <TTCcmdCntr[0][15]_GND_11_o_add_68_OUT> created at line 852.
    Found 16-bit adder for signal <TTCcmdCntr[1][15]_GND_11_o_add_70_OUT> created at line 856.
    Found 16-bit adder for signal <TTCcmdCntr[2][15]_GND_11_o_add_72_OUT> created at line 856.
    Found 16-bit adder for signal <TTCcmdCntr[3][15]_GND_11_o_add_74_OUT> created at line 856.
    Found 16-bit adder for signal <TTCcmdCntr[4][15]_GND_11_o_add_76_OUT> created at line 856.
    Found 16-bit adder for signal <TTCcmdCntr[5][15]_GND_11_o_add_78_OUT> created at line 856.
    Found 16-bit adder for signal <TTCcmdCntr[6][15]_GND_11_o_add_80_OUT> created at line 856.
    Found 16-bit adder for signal <TTCcmdCntr[7][15]_GND_11_o_add_82_OUT> created at line 856.
    Found 16-bit adder for signal <TTCcmdCntr[8][15]_GND_11_o_add_84_OUT> created at line 856.
    Found 16-bit adder for signal <TTCcmdCntr[9][15]_GND_11_o_add_86_OUT> created at line 856.
    Found 16-bit adder for signal <TTCcmdCntr[10][15]_GND_11_o_add_88_OUT> created at line 856.
    Found 16-bit adder for signal <TTCcmdCntr[11][15]_GND_11_o_add_90_OUT> created at line 856.
    Found 16-bit adder for signal <TTCcmdCntr[12][15]_GND_11_o_add_92_OUT> created at line 856.
    Found 16-bit adder for signal <TTCcmdCntr[13][15]_GND_11_o_add_94_OUT> created at line 856.
    Found 16-bit adder for signal <TTCcmdCntr[14][15]_GND_11_o_add_96_OUT> created at line 856.
    Found 16-bit adder for signal <TTCcmdCntr[15][15]_GND_11_o_add_98_OUT> created at line 856.
    Found 27-bit adder for signal <conf_cntr[26]_GND_11_o_add_127_OUT> created at line 938.
    Found 4-bit adder for signal <div[3]_GND_11_o_add_138_OUT> created at line 1175.
    Found 3-bit adder for signal <RxV6Cntr[2]_GND_11_o_add_141_OUT> created at line 1206.
    Found 16-bit adder for signal <T3_L1A_cnt[15]_GND_11_o_add_179_OUT> created at line 1382.
    Found 20-bit adder for signal <ipbclk_cntr[19]_GND_11_o_add_186_OUT> created at line 1393.
    Found 20-bit adder for signal <TTC_cntr[19]_GND_11_o_add_190_OUT> created at line 1405.
    Found 5-bit adder for signal <DNA_div[4]_GND_11_o_add_196_OUT> created at line 1423.
    Found 4-bit adder for signal <cmd_list_ra[3]_GND_11_o_add_283_OUT> created at line 1559.
    Found 4-bit adder for signal <cmd_list_wap[3]_GND_11_o_add_289_OUT> created at line 1572.
    Found 9-bit adder for signal <TTC_history_wa[8]_GND_11_o_add_291_OUT> created at line 1578.
    Found 9-bit adder for signal <buffer_wa[8]_GND_11_o_add_309_OUT> created at line 1685.
    Found 4-bit subtractor for signal <GND_11_o_GND_11_o_sub_207_OUT<3:0>> created at line 1458.
    Found 6-bit subtractor for signal <GND_11_o_GND_11_o_sub_273_OUT<5:0>> created at line 1537.
INFO:Xst:3019 - HDL ADVISOR - 256 flip-flops were inferred for signal <TTCcmdCntr>. You may be trying to describe a RAM in a way that is incompatible with block and distributed RAM resources available on Xilinx devices, or with a specific template that is not supported. Please review the Xilinx resources documentation and the XST user manual for coding guidelines. Taking advantage of RAM resources will lead to improved device usage and reduced synthesis time.
    Found 32-bit 4-to-1 multiplexer for signal <ipb_master_out_ipb_addr[1]_GND_11_o_wide_mux_160_OUT> created at line 1315.
    Found 32-bit 16-to-1 multiplexer for signal <ipb_master_out_ipb_addr[3]_GND_11_o_wide_mux_161_OUT> created at line 1326.
    Found 32-bit 16-to-1 multiplexer for signal <ipb_master_out_ipb_addr[3]_GND_11_o_wide_mux_164_OUT> created at line 1345.
    Found 16-bit 16-to-1 multiplexer for signal <ipb_master_out_ipb_addr[3]_TTCcmdCntr[15][15]_wide_mux_166_OUT> created at line 1364.
    Found 32-bit 4-to-1 multiplexer for signal <_n1425> created at line 1308.
    Found 1-bit tristate buffer for signal <FLASH_S2> created at line 527
    Found 1-bit tristate buffer for signal <T3_SCK> created at line 531
    Found 1-bit tristate buffer for signal <FSIO_MISO> created at line 546
    Found 27-bit comparator equal for signal <conf_cntr[26]_conf_end[26]_equal_132_o> created at line 961
    Summary:
	inferred  38 Adder/Subtractor(s).
	inferred 1159 D-type flip-flop(s).
	inferred   1 Comparator(s).
	inferred 107 Multiplexer(s).
	inferred   3 Tristate(s).
Unit <AMC13_T2> synthesized.

Synthesizing Unit <SPI_if>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/SPI/SPI_if.vhd".
WARNING:Xst:647 - Input <SPI_rdata> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:2935 - Signal 'STATUS<2:0>', unconnected in block 'SPI_if', is tied to its initial value (000).
    Found 1-bit register for signal <SPI_read>.
    Found 1-bit register for signal <READ_STATUS>.
    Found 1-bit register for signal <WRITE_CTL>.
    Found 1-bit register for signal <SPI_we_i>.
    Found 1-bit register for signal <SPI_we_q>.
    Found 1-bit register for signal <SPI_write>.
    Found 5-bit register for signal <BitCntr>.
    Found 7-bit register for signal <sr_in>.
    Found 1-bit register for signal <STATUS<7>>.
    Found 1-bit register for signal <STATUS<6>>.
    Found 1-bit register for signal <STATUS<5>>.
    Found 1-bit register for signal <STATUS<4>>.
    Found 8-bit register for signal <SLOT>.
    Found 32-bit register for signal <NET_MASK>.
    Found 32-bit register for signal <SPI_IPADDR>.
    Found 16-bit register for signal <BOOT_VECTOR>.
    Found 16-bit register for signal <addr>.
    Found 8-bit register for signal <sr_out>.
    Found 3-bit adder for signal <BitCntr[2]_GND_15_o_add_14_OUT> created at line 100.
    Found 16-bit adder for signal <addr[15]_GND_15_o_add_38_OUT> created at line 168.
    Found 8-bit 16-to-1 multiplexer for signal <addr[3]_GND_15_o_wide_mux_55_OUT> created at line 196.
    Summary:
	inferred   2 Adder/Subtractor(s).
	inferred 134 D-type flip-flop(s).
	inferred  16 Multiplexer(s).
Unit <SPI_if> synthesized.

Synthesizing Unit <flash>.
    Related source file is "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/T2_flash.vhd".
WARNING:Xst:647 - Input <addr<31:16>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/T2_flash.vhd" line 163: Output port <DOA> of the instance <i_rbuf> is unconnected or connected to loadless signal.
    Found 4-bit register for signal <web>.
    Found 1-bit register for signal <clk_toggle>.
    Found 1-bit register for signal <en_FLASH>.
    Found 13-bit register for signal <addra>.
    Found 1-bit register for signal <cmd>.
    Found 1-bit register for signal <wea>.
    Found 2-bit register for signal <en_FLASH_dl>.
    Found 2-bit register for signal <MCS>.
    Found 1-bit register for signal <MD>.
    Found 14-bit register for signal <addrap>.
    Found 1-bit register for signal <flash_busy>.
    Found 1-bit register for signal <rd>.
    Found 9-bit register for signal <byte_cnt>.
    Found 1-bit register for signal <en_FLASHp>.
    Found 1-bit register for signal <clk_toggle_q>.
    Found 12-bit adder for signal <addra[11]_GND_110_o_add_5_OUT> created at line 97.
    Found 12-bit adder for signal <addrap[11]_GND_110_o_add_8_OUT> created at line 109.
    Found 9-bit comparator equal for signal <addra[11]_byte_cnt[8]_equal_4_o> created at line 90
    Summary:
	inferred   2 Adder/Subtractor(s).
	inferred  53 D-type flip-flop(s).
	inferred   1 Comparator(s).
	inferred  14 Multiplexer(s).
Unit <flash> synthesized.

Synthesizing Unit <BRAM_TDP_MACRO_1>.
    Related source file is "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd".
        BRAM_SIZE = "18Kb"
        DEVICE = "SPARTAN6"
        DOA_REG = 0
        DOB_REG = 0
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        INIT_A = "000000000000000000000000000000000000"
        INIT_B = "000000000000000000000000000000000000"
        INIT_FILE = "NONE"
        READ_WIDTH_A = 1
        READ_WIDTH_B = 32
        SIM_COLLISION_CHECK = "ALL"
        SIM_MODE = "SAFE"
        SRVAL_A = "000000000000000000000000000000000000"
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        WRITE_MODE_A = "WRITE_FIRST"
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WARNING:Xst:2935 - Signal 'dia_pattern<31:1>', unconnected in block 'BRAM_TDP_MACRO_1', is tied to its initial value (0000000000000000000000000000000).
WARNING:Xst:2935 - Signal 'dipa_pattern', unconnected in block 'BRAM_TDP_MACRO_1', is tied to its initial value (0000).
WARNING:Xst:2935 - Signal 'dipb_pattern', unconnected in block 'BRAM_TDP_MACRO_1', is tied to its initial value (0000).
    Summary:
	no macro.
Unit <BRAM_TDP_MACRO_1> synthesized.

Synthesizing Unit <BRAM_TDP_MACRO_2>.
    Related source file is "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd".
        BRAM_SIZE = "18Kb"
        DEVICE = "SPARTAN6"
        DOA_REG = 0
        DOB_REG = 0
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        INIT_6E = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"
        INIT_6F = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"
        INIT_70 = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"
        INIT_71 = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"
        INIT_72 = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"
        INIT_73 = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"
        INIT_74 = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"
        INIT_75 = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"
        INIT_76 = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"
        INIT_77 = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"
        INIT_78 = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"
        INIT_79 = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"
        INIT_7A = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"
        INIT_7B = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"
        INIT_7C = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"
        INIT_7D = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"
        INIT_7E = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"
        INIT_7F = "0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"
        INIT_A = "000000000000000000000000000000000000"
        INIT_B = "000000000000000000000000000000000000"
        INIT_FILE = "NONE"
        READ_WIDTH_A = 1
        READ_WIDTH_B = 32
        SIM_COLLISION_CHECK = "ALL"
        SIM_MODE = "SAFE"
        SRVAL_A = "000000000000000000000000000000000000"
        SRVAL_B = "000000000000000000000000000000000000"
        WRITE_MODE_A = "WRITE_FIRST"
        WRITE_MODE_B = "WRITE_FIRST"
        WRITE_WIDTH_A = 1
        WRITE_WIDTH_B = 32
WARNING:Xst:2935 - Signal 'dia_pattern<31:1>', unconnected in block 'BRAM_TDP_MACRO_2', is tied to its initial value (0000000000000000000000000000000).
WARNING:Xst:2935 - Signal 'dipa_pattern', unconnected in block 'BRAM_TDP_MACRO_2', is tied to its initial value (0000).
WARNING:Xst:2935 - Signal 'dipb_pattern', unconnected in block 'BRAM_TDP_MACRO_2', is tied to its initial value (0000).
    Summary:
	no macro.
Unit <BRAM_TDP_MACRO_2> synthesized.

Synthesizing Unit <GTP_if>.
    Related source file is "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/GTP_if_AXI4.vhd".
    Set property "KEEP = TRUE" for signal <GbEresetDone>.
WARNING:Xst:647 - Input <debug_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/GTP_if_AXI4.vhd" line 341: Output port <status_vector> of the instance <i_GbE_pcs_pma> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/GTP_if_AXI4.vhd" line 341: Output port <gmii_isolate> of the instance <i_GbE_pcs_pma> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/GTP_if_AXI4.vhd" line 376: Output port <TILE0_RXDISPERR0_OUT> of the instance <i_S6Link_GbE> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/GTP_if_AXI4.vhd" line 376: Output port <TILE0_GTPCLKOUT0_OUT> of the instance <i_S6Link_GbE> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/GTP_if_AXI4.vhd" line 376: Output port <TILE0_REFCLKOUT1_OUT> of the instance <i_S6Link_GbE> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/GTP_if_AXI4.vhd" line 376: Output port <TILE0_RESETDONE0_OUT> of the instance <i_S6Link_GbE> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/GTP_if_AXI4.vhd" line 376: Output port <TILE0_RESETDONE1_OUT> of the instance <i_S6Link_GbE> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/GTP_if_AXI4.vhd" line 376: Output port <TILE0_RXBYTEREALIGN0_OUT> of the instance <i_S6Link_GbE> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/GTP_if_AXI4.vhd" line 376: Output port <TILE0_RXCOMMADET0_OUT> of the instance <i_S6Link_GbE> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/GTP_if_AXI4.vhd" line 376: Output port <TILE0_RXRECCLK1_OUT> of the instance <i_S6Link_GbE> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/GTP_if_AXI4.vhd" line 376: Output port <TILE0_TXOUTCLK0_OUT> of the instance <i_S6Link_GbE> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/GTP_if_AXI4.vhd" line 376: Output port <TILE0_TXOUTCLK1_OUT> of the instance <i_S6Link_GbE> is unconnected or connected to loadless signal.
WARNING:Xst:653 - Signal <debug_out> is used but never assigned. This sourceless signal will be automatically connected to value GND.
    Found 16-bit register for signal <wait_cntr>.
    Found 16-bit adder for signal <wait_cntr[15]_GND_163_o_add_2_OUT> created at line 317.
    Summary:
	inferred   1 Adder/Subtractor(s).
	inferred  16 D-type flip-flop(s).
	inferred   1 Multiplexer(s).
Unit <GTP_if> synthesized.

Synthesizing Unit <soft_emac>.
    Related source file is "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/soft_emac_AXI4.vhd".
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/soft_emac_AXI4.vhd" line 208: Output port <bad_crc> of the instance <i_tx_CRC32D8> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/soft_emac_AXI4.vhd" line 267: Output port <crc> of the instance <i_rx_CRC32D8> is unconnected or connected to loadless signal.
    Found 1-bit register for signal <clientemactxdlast_dl>.
    Found 1-bit register for signal <clientemactxdvld_dl>.
    Found 1-bit register for signal <clientemactxdvld_dl2>.
    Found 8-bit register for signal <tx_buf_a>.
    Found 8-bit register for signal <tx_buf_b>.
    Found 2-bit register for signal <tx_header>.
    Found 5-bit register for signal <gap_cnt>.
    Found 3-bit register for signal <hdr_cnt>.
    Found 1-bit register for signal <emacphytxen>.
    Found 1-bit register for signal <clientemactxd_ended>.
    Found 1-bit register for signal <ce_tx_crc>.
    Found 3-bit register for signal <sel_FCS>.
    Found 8-bit register for signal <emacphytxd>.
    Found 11-bit register for signal <tx_byte_cnt>.
    Found 1-bit register for signal <enough_data>.
    Found 1-bit register for signal <emacphytxer>.
    Found 8-bit register for signal <tx_d>.
    Found 1-bit register for signal <init_tx_crc>.
    Found 8-bit register for signal <rx_crc_d>.
    Found 1-bit register for signal <phyemacrxdv_q>.
    Found 1-bit register for signal <ce_rx_crc>.
    Found 1-bit register for signal <phyemacrxer_q>.
    Found 11-bit register for signal <rx_byte_cnt>.
    Found 1-bit register for signal <rx_err>.
    Found 1-bit register for signal <type_err>.
    Found 2-bit register for signal <length_OK>.
    Found 1-bit register for signal <emacclientrxerr>.
    Found 1-bit register for signal <ce_rx_crc_q>.
    Found 1-bit register for signal <emacclientrxdvld>.
    Found 1-bit register for signal <emacclientrxdlast>.
    Found 8-bit register for signal <emacclientrxd>.
    Found 1-bit register for signal <ready>.
    Found 2-bit adder for signal <tx_header[1]_GND_164_o_add_5_OUT> created at line 132.
    Found 5-bit adder for signal <gap_cnt[4]_GND_164_o_add_9_OUT> created at line 137.
    Found 3-bit adder for signal <hdr_cnt[2]_GND_164_o_add_12_OUT> created at line 142.
    Found 3-bit adder for signal <sel_FCS[2]_GND_164_o_add_15_OUT> created at line 164.
    Found 11-bit adder for signal <tx_byte_cnt[10]_GND_164_o_add_23_OUT> created at line 184.
    Found 11-bit adder for signal <rx_byte_cnt[10]_GND_164_o_add_39_OUT> created at line 236.
    Found 8-bit 4-to-1 multiplexer for signal <sel_FCS[1]_tx_crc[31]_wide_mux_19_OUT> created at line 167.
    Summary:
	inferred   6 Adder/Subtractor(s).
	inferred 104 D-type flip-flop(s).
	inferred   5 Multiplexer(s).
Unit <soft_emac> synthesized.

Synthesizing Unit <EthernetCRC>.
    Related source file is "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/EthernetCRC.vhd".
    Found 2-bit register for signal <byte_cnt>.
    Found 32-bit register for signal <crc_i>.
    Found 1-bit register for signal <invert>.
    Summary:
	inferred  35 D-type flip-flop(s).
Unit <EthernetCRC> synthesized.

Synthesizing Unit <S6Link_GbE>.
    Related source file is "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/s6link_gbe.vhd".
        WRAPPER_SIM_GTPRESET_SPEEDUP = 0
        WRAPPER_CLK25_DIVIDER_0 = 5
        WRAPPER_CLK25_DIVIDER_1 = 5
        WRAPPER_PLL_DIVSEL_FB_0 = 2
        WRAPPER_PLL_DIVSEL_FB_1 = 2
        WRAPPER_PLL_DIVSEL_REF_0 = 1
        WRAPPER_PLL_DIVSEL_REF_1 = 1
        WRAPPER_SIMULATION = 0
    Summary:
	no macro.
Unit <S6Link_GbE> synthesized.

Synthesizing Unit <S6Link_GbE_tile>.
    Related source file is "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/s6link_gbe_tile.vhd".
        TILE_SIM_GTPRESET_SPEEDUP = 0
        TILE_CLK25_DIVIDER_0 = 5
        TILE_CLK25_DIVIDER_1 = 5
        TILE_PLL_DIVSEL_FB_0 = 2
        TILE_PLL_DIVSEL_FB_1 = 2
        TILE_PLL_DIVSEL_REF_0 = 1
        TILE_PLL_DIVSEL_REF_1 = 1
        TILE_PLL_SOURCE_0 = "PLL0"
        TILE_PLL_SOURCE_1 = "PLL1"
    Summary:
	no macro.
Unit <S6Link_GbE_tile> synthesized.

Synthesizing Unit <ipbus_ctrl>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/ipbus_ctrl.vhd".
        MAC_CFG = external
        IP_CFG = external
        BUFWIDTH = 4
        INTERNALWIDTH = 1
        ADDRWIDTH = 11
        IPBUSPORT = "1100001101010001"
        SECONDARYPORT = '0'
        N_OOB = 0
INFO:Xst:3210 - "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/ipbus_ctrl.vhd" line 81: Output port <rxpacket_ignored> of the instance <udp_if> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/ipbus_ctrl.vhd" line 81: Output port <rxpacket_dropped> of the instance <udp_if> is unconnected or connected to loadless signal.
    Summary:
	no macro.
Unit <ipbus_ctrl> synthesized.

Synthesizing Unit <UDP_if>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_if_flat.vhd".
        BUFWIDTH = 4
        INTERNALWIDTH = 1
        ADDRWIDTH = 11
        IPBUSPORT = "1100001101010001"
        SECONDARYPORT = '0'
WARNING:Xst:647 - Input <raddr<11:9>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <waddr<11:9>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
INFO:Xst:3210 - "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_if_flat.vhd" line 460: Output port <clean_buf> of the instance <internal_ram_selector> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_if_flat.vhd" line 509: Output port <clean_buf> of the instance <rx_ram_selector> is unconnected or connected to loadless signal.
    Found 1-bit register for signal <last_rx_last>.
    Summary:
	inferred   1 D-type flip-flop(s).
	inferred   1 Multiplexer(s).
Unit <UDP_if> synthesized.

Synthesizing Unit <udp_ipaddr_block>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_ipaddr_block.vhd".
    Found 42-bit register for signal <IP_addr_rx_block.pkt_mask>.
    Found 32-bit register for signal <IP_addr_rx_block.IP_addr_rx_int>.
    Found 32-bit register for signal <IP_addr_rx>.
    Found 1-bit register for signal <My_IP_addr_block.Got_IP_addr_rx>.
    Found 32-bit register for signal <My_IP_addr_block.My_IP_addr_int>.
    Found 32-bit register for signal <My_IP_addr>.
    Found 1-bit register for signal <rarp_mode>.
    Found 1-bit register for signal <IP_addr_rx_vld>.
    Summary:
	inferred 173 D-type flip-flop(s).
	inferred   9 Multiplexer(s).
Unit <udp_ipaddr_block> synthesized.

Synthesizing Unit <udp_rarp_block>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_rarp_block.vhd".
    Found 13-bit register for signal <rarp_end_addr>.
    Found 1-bit register for signal <rarp_send>.
    Found 42-bit register for signal <data_block.we_buffer>.
    Found 336-bit register for signal <data_block.data_buffer>.
    Found 8-bit register for signal <rarp_data>.
    Found 1-bit register for signal <rarp_we_sig>.
    Found 6-bit register for signal <addr_block.next_addr>.
    Found 1-bit register for signal <addr_block.counting>.
    Found 6-bit register for signal <address>.
    Found 24-bit register for signal <tick_counter.counter_int>.
    Found 1-bit register for signal <tick>.
    Found 16-bit register for signal <random.x>.
    Found 16-bit register for signal <random.y>.
    Found 5-bit register for signal <rndm>.
    Found 6-bit register for signal <rarp_req_block.req_count>.
    Found 6-bit register for signal <rarp_req_block.req_end>.
    Found 1-bit register for signal <rarp_req>.
    Found 1-bit register for signal <send_packet.last_we>.
    Found 6-bit adder for signal <addr_block.next_addr[5]_GND_269_o_add_13_OUT> created at line 1241.
    Found 24-bit adder for signal <tick_counter.counter_int[23]_GND_269_o_add_18_OUT> created at line 1241.
    Found 6-bit adder for signal <rarp_req_block.req_count[5]_GND_269_o_add_34_OUT> created at line 1241.
    Found 6-bit comparator equal for signal <rarp_req_block.req_count[5]_rarp_req_block.req_end[5]_equal_34_o> created at line 190
    Summary:
	inferred   3 Adder/Subtractor(s).
	inferred 490 D-type flip-flop(s).
	inferred   1 Comparator(s).
	inferred  13 Multiplexer(s).
Unit <udp_rarp_block> synthesized.

Synthesizing Unit <udp_build_arp>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_build_arp.vhd".
    Found 13-bit register for signal <arp_end_addr>.
    Found 1-bit register for signal <arp_send>.
    Found 1-bit register for signal <set_addr>.
    Found 6-bit register for signal <addr_to_set>.
    Found 1-bit register for signal <build_packet.send_buf_int>.
    Found 1-bit register for signal <build_packet.load_buf_int>.
    Found 48-bit register for signal <build_packet.buf_to_load_int>.
    Found 1-bit register for signal <build_packet.arp_we_i>.
    Found 1-bit register for signal <arp_we_sig>.
    Found 1-bit register for signal <load_buf>.
    Found 48-bit register for signal <buf_to_load>.
    Found 1-bit register for signal <send_buf>.
    Found 6-bit register for signal <next_addr.addr_to_set_buf>.
    Found 1-bit register for signal <next_addr.set_addr_buf>.
    Found 6-bit register for signal <next_addr.addr_int>.
    Found 6-bit register for signal <address>.
    Found 6-bit register for signal <next_addr.next_addr>.
    Found 48-bit register for signal <write_data.shift_buf>.
    Found 8-bit register for signal <arp_data>.
    Found 1-bit register for signal <send_packet.send_pending>.
    Found 6-bit adder for signal <next_addr.addr_int[5]_GND_270_o_add_32_OUT> created at line 1241.
    Summary:
	inferred   1 Adder/Subtractor(s).
	inferred 205 D-type flip-flop(s).
	inferred  15 Multiplexer(s).
Unit <udp_build_arp> synthesized.

Synthesizing Unit <udp_build_payload>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_build_payload.vhd".
    Found 1-bit register for signal <send_packet.send_pending_i>.
    Found 1-bit register for signal <send_packet.last_we>.
    Found 1-bit register for signal <payload_send>.
    Found 1-bit register for signal <send_pending>.
    Found 1-bit register for signal <set_address_block.cksum_pending>.
    Found 1-bit register for signal <set_addr>.
    Found 1-bit register for signal <build_packet.send_buf_int>.
    Found 1-bit register for signal <build_packet.load_buf_int>.
    Found 1-bit register for signal <build_packet.cksum_pending>.
    Found 16-bit register for signal <build_packet.payload_len>.
    Found 16-bit register for signal <build_packet.buf_to_load_int>.
    Found 1-bit register for signal <build_packet.payload_we_i>.
    Found 1-bit register for signal <payload_we_sig>.
    Found 1-bit register for signal <load_buf>.
    Found 16-bit register for signal <buf_to_load>.
    Found 1-bit register for signal <send_buf>.
    Found 1-bit register for signal <do_cksum.do_sum_int>.
    Found 1-bit register for signal <do_cksum.clr_sum_int>.
    Found 1-bit register for signal <do_cksum.int_valid_int>.
    Found 1-bit register for signal <do_cksum.cksum_int>.
    Found 8-bit register for signal <do_cksum.int_data_int>.
    Found 16-bit register for signal <do_cksum.payload_len>.
    Found 1-bit register for signal <do_sum_payload>.
    Found 1-bit register for signal <clr_sum_payload>.
    Found 8-bit register for signal <int_data_payload>.
    Found 1-bit register for signal <int_valid_payload>.
    Found 1-bit register for signal <cksum>.
    Found 13-bit register for signal <next_addr_block.addr_to_set_buf>.
    Found 1-bit register for signal <next_addr_block.set_addr_buf>.
    Found 13-bit register for signal <next_addr_block.addr_int>.
    Found 13-bit register for signal <next_addr_block.next_addr_int>.
    Found 13-bit register for signal <next_addr>.
    Found 1-bit register for signal <next_low>.
    Found 13-bit register for signal <address_block.addr_to_set_buf>.
    Found 1-bit register for signal <address_block.set_addr_buf>.
    Found 13-bit register for signal <address_block.addr_int>.
    Found 1-bit register for signal <address_block.low_addr_i>.
    Found 13-bit register for signal <address>.
    Found 1-bit register for signal <low_addr>.
    Found 1-bit register for signal <byteswap_block.set_addr_buf>.
    Found 1-bit register for signal <byteswap_block.byteswap_int>.
    Found 1-bit register for signal <byteswap>.
    Found 16-bit register for signal <write_data.shift_buf>.
    Found 8-bit register for signal <payload_data_sig>.
    Found 32-bit register for signal <do_ipbus_hdr.ipbus_hdr_int>.
    Found 32-bit register for signal <ipbus_in_hdr>.
    Found 1-bit register for signal <send_packet.next_state>.
    Found 6-bit register for signal <addr_to_set>.
    Found 13-bit adder for signal <next_addr_block.addr_int[12]_GND_271_o_add_61_OUT> created at line 1241.
    Found 16-bit 4-to-1 multiplexer for signal <_n0299> created at line 243.
    WARNING:Xst:2404 -  FFs/Latches <addr_to_set<12:6>> (without init value) have a constant value of 0 in block <udp_build_payload>.
    Summary:
	inferred   1 Adder/Subtractor(s).
	inferred 295 D-type flip-flop(s).
	inferred  76 Multiplexer(s).
Unit <udp_build_payload> synthesized.

Synthesizing Unit <udp_build_ping>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_build_ping.vhd".
    Found 1-bit register for signal <send_packet.send_i>.
    Found 13-bit register for signal <send_packet.end_addr_i>.
    Found 1-bit register for signal <send_packet.send_pending_i>.
    Found 1-bit register for signal <send_packet.last_we>.
    Found 13-bit register for signal <ping_end_addr>.
    Found 1-bit register for signal <ping_send>.
    Found 1-bit register for signal <send_pending>.
    Found 1-bit register for signal <set_addr>.
    Found 1-bit register for signal <build_packet.send_buf_int>.
    Found 1-bit register for signal <build_packet.load_buf_int>.
    Found 16-bit register for signal <build_packet.buf_to_load_int>.
    Found 1-bit register for signal <build_packet.cksum_pending>.
    Found 1-bit register for signal <ping_we_sig>.
    Found 1-bit register for signal <load_buf>.
    Found 16-bit register for signal <buf_to_load>.
    Found 1-bit register for signal <send_buf>.
    Found 1-bit register for signal <do_cksum.do_sum_int>.
    Found 1-bit register for signal <do_sum_ping>.
    Found 1-bit register for signal <clr_sum_ping>.
    Found 8-bit register for signal <int_data_ping>.
    Found 1-bit register for signal <int_valid_ping>.
    Found 13-bit register for signal <next_addr.addr_to_set_buf>.
    Found 1-bit register for signal <next_addr.set_addr_buf>.
    Found 13-bit register for signal <next_addr.addr_int>.
    Found 1-bit register for signal <next_addr.low_addr_i>.
    Found 13-bit register for signal <address>.
    Found 1-bit register for signal <low_addr>.
    Found 13-bit register for signal <next_addr.next_addr>.
    Found 1-bit register for signal <next_addr.next_low>.
    Found 16-bit register for signal <write_data.shift_buf>.
    Found 8-bit register for signal <ping_data>.
    Found 2-bit register for signal <send_packet.next_state>.
    Found 6-bit register for signal <addr_to_set>.
    Found 13-bit adder for signal <next_addr.addr_int[12]_GND_272_o_add_55_OUT> created at line 1241.
    Found 1-bit 3-to-1 multiplexer for signal <send_packet.next_state[1]_X_32_o_Mux_4_o> created at line 53.
    Found 13-bit 3-to-1 multiplexer for signal <send_packet.next_state[1]_X_32_o_wide_mux_5_OUT> created at line 53.
    Found 1-bit 3-to-1 multiplexer for signal <send_packet.next_state[1]_X_32_o_Mux_6_o> created at line 53.
    Found 2-bit 3-to-1 multiplexer for signal <send_packet.next_state[1]_X_32_o_wide_mux_7_OUT> created at line 53.
    WARNING:Xst:2404 -  FFs/Latches <addr_to_set<12:6>> (without init value) have a constant value of 0 in block <udp_build_ping>.
    Summary:
	inferred   1 Adder/Subtractor(s).
	inferred 170 D-type flip-flop(s).
	inferred  43 Multiplexer(s).
Unit <udp_build_ping> synthesized.

Synthesizing Unit <udp_build_resend>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_build_resend.vhd".
    Found 45-bit register for signal <resend_pkt_id_block.pkt_mask>.
    Found 16-bit register for signal <resend_pkt_id_block.resend_pkt_id_int>.
    Found 16-bit register for signal <resend_pkt_id>.
    Found 1-bit register for signal <pkt_resend>.
    Summary:
	inferred  78 D-type flip-flop(s).
	inferred   5 Multiplexer(s).
Unit <udp_build_resend> synthesized.

Synthesizing Unit <udp_build_status>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_build_status.vhd".
    Found 1-bit register for signal <status_send>.
    Found 1-bit register for signal <send_pending>.
    Found 1-bit register for signal <status_we>.
    Found 1-bit register for signal <set_addr>.
    Found 7-bit register for signal <addr_to_set>.
    Found 7-bit register for signal <next_addr.addr_to_set_buf>.
    Found 1-bit register for signal <next_addr.set_addr_buf>.
    Found 7-bit register for signal <next_addr.addr_int>.
    Found 7-bit register for signal <address>.
    Found 7-bit register for signal <next_addr.next_addr>.
    Found 1-bit register for signal <load_data.send_buf_int>.
    Found 1-bit register for signal <load_data.next_load>.
    Found 1-bit register for signal <load_data.load_buf_int>.
    Found 1-bit register for signal <load_buf>.
    Found 1-bit register for signal <send_buf>.
    Found 1-bit register for signal <status_request>.
    Found 128-bit register for signal <write_data.shift_buf>.
    Found 8-bit register for signal <status_data>.
    Found 13-bit register for signal <status_end_addr>.
    Found 7-bit adder for signal <next_addr.addr_int[6]_GND_274_o_add_20_OUT> created at line 1241.
    Summary:
	inferred   1 Adder/Subtractor(s).
	inferred 195 D-type flip-flop(s).
	inferred  15 Multiplexer(s).
Unit <udp_build_status> synthesized.

Synthesizing Unit <udp_status_buffer>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_status_buffer.vhd".
        BUFWIDTH = 4
        ADDRWIDTH = 11
    Found 16-bit register for signal <header_block.next_pkt_id_int>.
    Found 128-bit register for signal <header>.
    Found 16-bit register for signal <next_pkt_id>.
    Found 1-bit register for signal <history_block.event_pending>.
    Found 1-bit register for signal <history_block.async_pending>.
    Found 128-bit register for signal <history>.
    Found 8-bit register for signal <history_block.event_data>.
    Found 5-bit register for signal <history_block.async_payload>.
    Found 1-bit register for signal <ready>.
    Found 1-bit register for signal <history_block.last_rst_ipb>.
    Found 1-bit register for signal <async_history_block.send>.
    Found 1-bit register for signal <async_history_block.sent>.
    Found 1-bit register for signal <async_history_block.written>.
    Found 1-bit register for signal <async_history_block.tx_send>.
    Found 1-bit register for signal <async_history_block.tx_sent>.
    Found 1-bit register for signal <async_history_block.tx_error>.
    Found 1-bit register for signal <async_history_block.last_tx_last>.
    Found 1-bit register for signal <async_event>.
    Found 5-bit register for signal <async_data>.
    Found 128-bit register for signal <ipbus_in>.
    Found 128-bit register for signal <ipbus_out>.
    Found 2-bit register for signal <tick>.
    Found 2-bit adder for signal <tick[1]_GND_275_o_add_1_OUT> created at line 74.
    Found 16-bit adder for signal <header_block.next_pkt_id_int[15]_GND_275_o_add_6_OUT> created at line 1241.
    Found 128-bit 4-to-1 multiplexer for signal <status_block> created at line 58.
    Summary:
	inferred   2 Adder/Subtractor(s).
	inferred 576 D-type flip-flop(s).
	inferred  97 Multiplexer(s).
Unit <udp_status_buffer> synthesized.

Synthesizing Unit <udp_byte_sum>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_byte_sum.vhd".
    Found 8-bit register for signal <lo_byte_calc.int_data_buf>.
    Found 1-bit register for signal <lo_byte_calc.int_valid_buf>.
    Found 9-bit register for signal <lo_byte_calc.hi_byte_int>.
    Found 9-bit register for signal <lo_byte_calc.lo_byte_int>.
    Found 9-bit register for signal <lo_byte>.
    Found 1-bit register for signal <hi_byte_calc.clr_sum_buf>.
    Found 9-bit register for signal <hi_byte_calc.hi_byte_int>.
    Found 1-bit register for signal <hi_byte_calc.carry_bit_int>.
    Found 1-bit register for signal <hi_byte_calc.hi_lo>.
    Found 1-bit register for signal <carry_bit>.
    Found 9-bit register for signal <hi_byte>.
    Found 1-bit register for signal <lo_byte_calc.clr_sum_buf>.
    Found 9-bit adder for signal <lo_byte_calc.hi_byte_int[8]_lo_byte_calc.lo_byte_int[8]_add_7_OUT> created at line 65.
    Found 9-bit adder for signal <GND_276_o_GND_276_o_add_12_OUT> created at line 1241.
    Summary:
	inferred   2 Adder/Subtractor(s).
	inferred  59 D-type flip-flop(s).
	inferred  14 Multiplexer(s).
Unit <udp_byte_sum> synthesized.

Synthesizing Unit <udp_do_rx_reset>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_do_rx_reset.vhd".
    Found 1-bit register for signal <rx_reset_buf.reset_latch>.
    Found 1-bit register for signal <rx_reset_sig>.
    Found 11-bit register for signal <rx_reset_buf.reset_buf<10:0>>.
    Summary:
	inferred  13 D-type flip-flop(s).
	inferred   3 Multiplexer(s).
Unit <udp_do_rx_reset> synthesized.

Synthesizing Unit <udp_packet_parser>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_packet_parser.vhd".
        IPBUSPORT = "1100001101010001"
        SECONDARYPORT = '0'
    Found 112-bit register for signal <arp.pkt_data>.
    Found 1-bit register for signal <arp.pkt_drop>.
    Found 1-bit register for signal <pkt_drop_arp_sig>.
    Found 38-bit register for signal <rarp.pkt_mask>.
    Found 128-bit register for signal <rarp.pkt_data>.
    Found 1-bit register for signal <rarp.pkt_drop>.
    Found 1-bit register for signal <pkt_drop_rarp_sig>.
    Found 34-bit register for signal <ip_pkt.pkt_mask>.
    Found 10-bit register for signal <ip_pkt.msk_mask>.
    Found 128-bit register for signal <ip_pkt.pkt_data>.
    Found 8-bit register for signal <ip_pkt.msk_data>.
    Found 1-bit register for signal <ip_pkt.pkt_drop>.
    Found 1-bit register for signal <pkt_drop_ip_sig>.
    Found 36-bit register for signal <ping.pkt_mask>.
    Found 24-bit register for signal <ping.pkt_data>.
    Found 1-bit register for signal <ping.pkt_drop>.
    Found 1-bit register for signal <pkt_drop_ping_sig>.
    Found 38-bit register for signal <ipbus_pkt.pkt_mask>.
    Found 24-bit register for signal <ipbus_pkt.pkt_data>.
    Found 1-bit register for signal <ipbus_pkt.pkt_drop>.
    Found 1-bit register for signal <pkt_drop_ipbus_sig>.
    Found 45-bit register for signal <ipbus_mask.pkt_mask>.
    Found 1-bit register for signal <ipbus_mask.last_mask>.
    Found 1-bit register for signal <ipbus_mask.header_sel>.
    Found 1-bit register for signal <ipbus_status_mask>.
    Found 1-bit register for signal <ipbus_hdr_mask>.
    Found 32-bit register for signal <bigendian.reliable_data>.
    Found 32-bit register for signal <bigendian.unreliable_data>.
    Found 1-bit register for signal <bigendian.pkt_drop_reliable_i>.
    Found 1-bit register for signal <bigendian.pkt_drop_unreliable>.
    Found 1-bit register for signal <pkt_drop_reliable_sig>.
    Found 1-bit register for signal <pkt_drop_payload_sig>.
    Found 32-bit register for signal <littleendian.reliable_data>.
    Found 32-bit register for signal <littleendian.unreliable_data>.
    Found 1-bit register for signal <littleendian.pkt_drop_reliable_i>.
    Found 1-bit register for signal <littleendian.pkt_drop_unreliable>.
    Found 1-bit register for signal <pkt_reliable_drop_sig>.
    Found 1-bit register for signal <pkt_payload_drop_sig>.
    Found 48-bit register for signal <status_request.pkt_data>.
    Found 1-bit register for signal <status_request.pkt_drop>.
    Found 1-bit register for signal <pkt_drop_status>.
    Found 16-bit register for signal <resend.pkt_data>.
    Found 4-bit register for signal <resend.pkt_mask>.
    Found 1-bit register for signal <resend.pkt_drop>.
    Found 1-bit register for signal <pkt_drop_resend>.
    Found 6-bit register for signal <broadcast.pkt_mask>.
    Found 1-bit register for signal <broadcast.broadcast_int>.
    Found 1-bit register for signal <pkt_broadcast>.
    Found 42-bit register for signal <arp.pkt_mask>.
    Found 8-bit comparator not equal for signal <n0008> created at line 77
    Found 8-bit comparator not equal for signal <n0024> created at line 116
    Found 8-bit comparator not equal for signal <n0041> created at line 159
    Found 8-bit comparator not equal for signal <n0067> created at line 209
    Found 8-bit comparator not equal for signal <n0085> created at line 252
    Found 8-bit comparator not equal for signal <n0117> created at line 318
    Found 8-bit comparator not equal for signal <n0120> created at line 321
    Found 8-bit comparator not equal for signal <n0146> created at line 361
    Found 8-bit comparator not equal for signal <n0149> created at line 364
    Found 8-bit comparator not equal for signal <n0176> created at line 399
    Found 8-bit comparator not equal for signal <n0193> created at line 430
    Summary:
	inferred 897 D-type flip-flop(s).
	inferred  11 Comparator(s).
	inferred  80 Multiplexer(s).
Unit <udp_packet_parser> synthesized.

Synthesizing Unit <udp_rxram_mux>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_rxram_mux.vhd".
    Found 1-bit register for signal <ram_ready>.
    Found 1-bit register for signal <rxram_dropped>.
    Found 13-bit register for signal <rxram_end_addr>.
    Found 1-bit register for signal <rxram_send_sig>.
    Found 8-bit register for signal <dia>.
    Found 13-bit register for signal <addra>.
    Found 1-bit register for signal <wea>.
    Found 1-bit register for signal <do_ram_ready.ram_ready_int>.
    Summary:
	inferred  39 D-type flip-flop(s).
	inferred  19 Multiplexer(s).
Unit <udp_rxram_mux> synthesized.

Synthesizing Unit <udp_DualPortRAM>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_dualportram.vhd".
        BUFWIDTH = 1
        ADDRWIDTH = 11
WARNING:Xst:37 - Detected unknown constraint/property "block_ram". This constraint/property is not supported by the current software release and will be ignored.
    Found 4096x8-bit dual-port RAM <Mram_ram> for signal <ram>.
    Found 8-bit register for signal <dob>.
    Summary:
	inferred   1 RAM(s).
	inferred   8 D-type flip-flop(s).
Unit <udp_DualPortRAM> synthesized.

Synthesizing Unit <udp_buffer_selector_1>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_buffer_selector.vhd".
        BUFWIDTH = 1
    Found 2-bit register for signal <free>.
    Found 2-bit register for signal <clean_block.clean_i>.
    Found 2-bit register for signal <clean>.
    Found 2-bit register for signal <send_pending_block.send_pending_i>.
    Found 2-bit register for signal <send_pending>.
    Found 1-bit register for signal <busy_block.busy_i>.
    Found 1-bit register for signal <busy_sig>.
    Found 1-bit register for signal <req_send_block.sending_i>.
    Found 1-bit register for signal <req_send>.
    Found 1-bit register for signal <sending>.
    Found 1-bit register for signal <write_block.write_i>.
    Found 1-bit register for signal <write_sig>.
    Found 1-bit register for signal <send_block.send_i>.
    Found 1-bit register for signal <send_sig>.
    Found 2-bit register for signal <free_block.free_i>.
    Found 1-bit adder for signal <write_sig[0]_PWR_144_o_add_27_OUT<0>> created at line 1241.
    Found 1-bit adder for signal <send_sig[0]_PWR_144_o_add_29_OUT<0>> created at line 1241.
    Summary:
	inferred   2 Adder/Subtractor(s).
	inferred  21 D-type flip-flop(s).
	inferred  35 Multiplexer(s).
Unit <udp_buffer_selector_1> synthesized.

Synthesizing Unit <udp_rxram_shim>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_rxram_shim.vhd".
        BUFWIDTH = 1
    Found 13-bit register for signal <end_address_buf<0>>.
    Found 1-bit register for signal <rxram_send_x>.
    Found 13-bit register for signal <rxram_end_addr_x>.
    Found 1-bit register for signal <rxram_sent>.
    Found 1-bit register for signal <last_busy>.
    Found 13-bit register for signal <end_address_buf<1>>.
    Summary:
	inferred  42 D-type flip-flop(s).
	inferred   1 Multiplexer(s).
Unit <udp_rxram_shim> synthesized.

Synthesizing Unit <udp_DualPortRAM_rx>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_dualportram_rx.vhd".
        BUFWIDTH = 4
        ADDRWIDTH = 11
WARNING:Xst:37 - Detected unknown constraint/property "block_ram". This constraint/property is not supported by the current software release and will be ignored.
WARNING:Xst:37 - Detected unknown constraint/property "block_ram". This constraint/property is not supported by the current software release and will be ignored.
WARNING:Xst:37 - Detected unknown constraint/property "block_ram". This constraint/property is not supported by the current software release and will be ignored.
WARNING:Xst:37 - Detected unknown constraint/property "block_ram". This constraint/property is not supported by the current software release and will be ignored.
    Found 8192x8-bit dual-port RAM <Mram_ram1> for signal <ram1>.
    Found 8192x8-bit dual-port RAM <Mram_ram2> for signal <ram2>.
    Found 8192x8-bit dual-port RAM <Mram_ram3> for signal <ram3>.
    Found 8192x8-bit dual-port RAM <Mram_ram4> for signal <ram4>.
    Found 32-bit register for signal <rx_dob>.
    Summary:
	inferred   4 RAM(s).
	inferred  32 D-type flip-flop(s).
Unit <udp_DualPortRAM_rx> synthesized.

Synthesizing Unit <udp_buffer_selector_2>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_buffer_selector.vhd".
        BUFWIDTH = 4
    Found 16-bit register for signal <free>.
    Found 16-bit register for signal <clean_block.clean_i>.
    Found 16-bit register for signal <clean>.
    Found 16-bit register for signal <send_pending_block.send_pending_i>.
    Found 16-bit register for signal <send_pending>.
    Found 1-bit register for signal <busy_block.busy_i>.
    Found 1-bit register for signal <busy_sig>.
    Found 1-bit register for signal <req_send_block.sending_i>.
    Found 1-bit register for signal <req_send>.
    Found 1-bit register for signal <sending>.
    Found 4-bit register for signal <write_block.write_i>.
    Found 4-bit register for signal <write_sig>.
    Found 4-bit register for signal <send_block.send_i>.
    Found 4-bit register for signal <send_sig>.
    Found 16-bit register for signal <free_block.free_i>.
    Found 4-bit adder for signal <write_sig[3]_GND_287_o_add_34_OUT> created at line 1241.
    Found 4-bit adder for signal <send_sig[3]_GND_287_o_add_42_OUT> created at line 1241.
    Found 1-bit 16-to-1 multiplexer for signal <resend_buf[3]_clean[15]_Mux_5_o> created at line 55.
    Found 1-bit 16-to-1 multiplexer for signal <write_sig[3]_free[15]_Mux_30_o> created at line 123.
    Found 1-bit 16-to-1 multiplexer for signal <send_sig[3]_send_pending[15]_Mux_31_o> created at line 145.
    Summary:
	inferred   2 Adder/Subtractor(s).
	inferred 117 D-type flip-flop(s).
	inferred 154 Multiplexer(s).
Unit <udp_buffer_selector_2> synthesized.

Synthesizing Unit <udp_DualPortRAM_tx>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_dualportram_tx.vhd".
        BUFWIDTH = 4
        ADDRWIDTH = 11
WARNING:Xst:37 - Detected unknown constraint/property "block_ram". This constraint/property is not supported by the current software release and will be ignored.
    Found 8192x32-bit dual-port RAM <Mram_ram> for signal <ram>.
    Found 2-bit register for signal <bytesel>.
    Found 32-bit register for signal <ram_out>.
    Found 8-bit 4-to-1 multiplexer for signal <tx_dob> created at line 56.
    Summary:
	inferred   1 RAM(s).
	inferred  34 D-type flip-flop(s).
	inferred   1 Multiplexer(s).
Unit <udp_DualPortRAM_tx> synthesized.

Synthesizing Unit <udp_rxtransactor_if>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_rxtransactor_if_simple.vhd".
    Found 1-bit register for signal <ram_ok>.
    Found 1-bit register for signal <pkt_rcvd>.
    Found 1-bit register for signal <rxpayload_dropped>.
    Found 1-bit register for signal <ram_status.ram_ok_i>.
    Summary:
	inferred   4 D-type flip-flop(s).
	inferred   5 Multiplexer(s).
Unit <udp_rxtransactor_if> synthesized.

Synthesizing Unit <udp_tx_mux>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_tx_mux.vhd".
    Found 13-bit register for signal <rx_event.rxram_end_addr_int>.
    Found 1-bit register for signal <rx_event.last_rxram_active>.
    Found 1-bit register for signal <rxram_busy_sig>.
    Found 13-bit register for signal <rxram_end_addr_sig>.
    Found 1-bit register for signal <udp_event.udpram_busy_int>.
    Found 1-bit register for signal <udp_event.last_udpram_active>.
    Found 1-bit register for signal <udpram_busy_sig>.
    Found 1-bit register for signal <udp_short_block.short_int>.
    Found 1-bit register for signal <udp_short_sig>.
    Found 1-bit register for signal <udp_send_data.send_special_int>.
    Found 8-bit register for signal <udp_send_data.special_int>.
    Found 1-bit register for signal <udp_send_data.flip_cksum>.
    Found 1-bit register for signal <send_special>.
    Found 8-bit register for signal <special>.
    Found 1-bit register for signal <do_udp_counter.counting>.
    Found 5-bit register for signal <do_udp_counter.counter>.
    Found 1-bit register for signal <do_udp_counter.last_udpram_active>.
    Found 1-bit register for signal <udp_counting>.
    Found 5-bit register for signal <udp_counter>.
    Found 1-bit register for signal <udp_control_build.cksum_int>.
    Found 1-bit register for signal <udp_control_build.clr_sum_int>.
    Found 1-bit register for signal <udp_control_build.do_sum_int>.
    Found 1-bit register for signal <udp_control_build.int_valid_int>.
    Found 1-bit register for signal <cksum>.
    Found 1-bit register for signal <clr_sum>.
    Found 1-bit register for signal <do_sum>.
    Found 1-bit register for signal <int_valid>.
    Found 13-bit register for signal <udp_build_data.udpram_end_addr_int>.
    Found 8-bit register for signal <udp_build_data.int_data_int>.
    Found 16-bit register for signal <udp_build_data.pay_len>.
    Found 16-bit register for signal <udp_build_data.ip_cksum_int>.
    Found 16-bit register for signal <udp_build_data.ip_len_int>.
    Found 16-bit register for signal <udp_build_data.udp_len_int>.
    Found 13-bit register for signal <udpram_end_addr_sig>.
    Found 8-bit register for signal <int_data>.
    Found 16-bit register for signal <ip_len>.
    Found 16-bit register for signal <ip_cksum>.
    Found 16-bit register for signal <udp_len>.
    Found 13-bit register for signal <next_addr.addr_int>.
    Found 1-bit register for signal <next_addr.byteswapping_int>.
    Found 13-bit register for signal <addr_sig>.
    Found 1-bit register for signal <low_addr>.
    Found 1-bit register for signal <byteswapping>.
    Found 13-bit register for signal <next_addr.next_addr>.
    Found 8-bit register for signal <send_data.mac_tx_data_int>.
    Found 8-bit register for signal <send_data.next_mac_tx_data>.
    Found 1-bit register for signal <send_data.ready_buf>.
    Found 8-bit register for signal <mac_tx_data_sig>.
    Found 32-bit register for signal <do_ipbus_hdr.ipbus_hdr_int>.
    Found 1-bit register for signal <do_ipbus_hdr.byteswap_int>.
    Found 1-bit register for signal <ipbus_out_valid>.
    Found 32-bit register for signal <ipbus_out_hdr>.
    Found 1-bit register for signal <byteswap_sig>.
    Found 3-bit register for signal <state_machine.state>.
    Found 1-bit register for signal <state_machine.rxram_active_int>.
    Found 1-bit register for signal <state_machine.udpram_active_int>.
    Found 1-bit register for signal <state_machine.counting_int>.
    Found 1-bit register for signal <state_machine.prefetch_int>.
    Found 1-bit register for signal <state_machine.mac_tx_valid_int>.
    Found 1-bit register for signal <state_machine.mac_tx_last_int>.
    Found 1-bit register for signal <state_machine.set_addr_int>.
    Found 13-bit register for signal <state_machine.addr_to_set_int>.
    Found 3-bit register for signal <state_machine.next_state>.
    Found 13-bit register for signal <state_machine.end_addr_int>.
    Found 1-bit register for signal <rxram_active>.
    Found 1-bit register for signal <udpram_active>.
    Found 1-bit register for signal <counting>.
    Found 1-bit register for signal <prefetch>.
    Found 1-bit register for signal <mac_tx_last_sig>.
    Found 1-bit register for signal <mac_tx_valid_sig>.
    Found 1-bit register for signal <set_addr>.
    Found 13-bit register for signal <addr_to_set>.
    Found 1-bit register for signal <rx_event.rxram_busy_int>.
    Found 5-bit adder for signal <do_udp_counter.counter[4]_GND_295_o_add_25_OUT> created at line 1241.
    Found 13-bit adder for signal <next_addr.addr_int[12]_GND_295_o_add_67_OUT> created at line 1241.
    Found 3-bit 8-to-1 multiplexer for signal <state_machine.state[2]_state_machine.next_state[2]_wide_mux_117_OUT> created at line 570.
    Found 13-bit comparator equal for signal <addr_sig[12]_state_machine.end_addr_int[12]_equal_105_o> created at line 614
    Summary:
	inferred   2 Adder/Subtractor(s).
	inferred 421 D-type flip-flop(s).
	inferred   1 Comparator(s).
	inferred 169 Multiplexer(s).
Unit <udp_tx_mux> synthesized.

Synthesizing Unit <udp_txtransactor_if>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_txtransactor_if_simple.vhd".
        BUFWIDTH = 4
WARNING:Xst:647 - Input <ipbus_out_hdr<7:0>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
    Found 16-bit register for signal <pkt_id_buf<14>>.
    Found 16-bit register for signal <pkt_id_buf<13>>.
    Found 16-bit register for signal <pkt_id_buf<12>>.
    Found 16-bit register for signal <pkt_id_buf<11>>.
    Found 16-bit register for signal <pkt_id_buf<10>>.
    Found 16-bit register for signal <pkt_id_buf<9>>.
    Found 16-bit register for signal <pkt_id_buf<8>>.
    Found 16-bit register for signal <pkt_id_buf<7>>.
    Found 16-bit register for signal <pkt_id_buf<6>>.
    Found 16-bit register for signal <pkt_id_buf<5>>.
    Found 16-bit register for signal <pkt_id_buf<4>>.
    Found 16-bit register for signal <pkt_id_buf<3>>.
    Found 16-bit register for signal <pkt_id_buf<2>>.
    Found 16-bit register for signal <pkt_id_buf<1>>.
    Found 16-bit register for signal <pkt_id_buf<0>>.
    Found 1-bit register for signal <req_not_found>.
    Found 1-bit register for signal <req_resend>.
    Found 4-bit register for signal <resend_buf>.
    Found 1-bit register for signal <udpram_sent>.
    Found 1-bit register for signal <sent_block.last_busy>.
    Found 16-bit register for signal <pkt_id_buf<15>>.
    Found 16-bit comparator equal for signal <resend_pkt_id[15]_pkt_id_buf[0][15]_equal_100_o> created at line 69
    Found 16-bit comparator equal for signal <resend_pkt_id[15]_pkt_id_buf[1][15]_equal_101_o> created at line 69
    Found 16-bit comparator equal for signal <resend_pkt_id[15]_pkt_id_buf[2][15]_equal_103_o> created at line 69
    Found 16-bit comparator equal for signal <resend_pkt_id[15]_pkt_id_buf[3][15]_equal_105_o> created at line 69
    Found 16-bit comparator equal for signal <resend_pkt_id[15]_pkt_id_buf[4][15]_equal_107_o> created at line 69
    Found 16-bit comparator equal for signal <resend_pkt_id[15]_pkt_id_buf[5][15]_equal_109_o> created at line 69
    Found 16-bit comparator equal for signal <resend_pkt_id[15]_pkt_id_buf[6][15]_equal_111_o> created at line 69
    Found 16-bit comparator equal for signal <resend_pkt_id[15]_pkt_id_buf[7][15]_equal_113_o> created at line 69
    Found 16-bit comparator equal for signal <resend_pkt_id[15]_pkt_id_buf[8][15]_equal_115_o> created at line 69
    Found 16-bit comparator equal for signal <resend_pkt_id[15]_pkt_id_buf[9][15]_equal_117_o> created at line 69
    Found 16-bit comparator equal for signal <resend_pkt_id[15]_pkt_id_buf[10][15]_equal_119_o> created at line 69
    Found 16-bit comparator equal for signal <resend_pkt_id[15]_pkt_id_buf[11][15]_equal_121_o> created at line 69
    Found 16-bit comparator equal for signal <resend_pkt_id[15]_pkt_id_buf[12][15]_equal_123_o> created at line 69
    Found 16-bit comparator equal for signal <resend_pkt_id[15]_pkt_id_buf[13][15]_equal_125_o> created at line 69
    Found 16-bit comparator equal for signal <resend_pkt_id[15]_pkt_id_buf[14][15]_equal_127_o> created at line 69
    Found 16-bit comparator equal for signal <resend_pkt_id[15]_pkt_id_buf[15][15]_equal_129_o> created at line 69
    Summary:
	inferred 264 D-type flip-flop(s).
	inferred  16 Comparator(s).
	inferred  29 Multiplexer(s).
Unit <udp_txtransactor_if> synthesized.

Synthesizing Unit <udp_clock_crossing_if>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/udp_clock_crossing_if.vhd".
        BUFWIDTH = 4
    Set property "KEEP = TRUE" for signal <enable_buf>.
    Set property "KEEP = TRUE" for signal <rarp_buf>.
    Set property "KEEP = TRUE" for signal <we_buf>.
    Set property "KEEP = TRUE" for signal <rst_ipb_buf>.
    Set property "KEEP = TRUE" for signal <req_send_buf>.
    Set property "KEEP = TRUE" for signal <pkt_done_read_buf>.
    Set property "KEEP = TRUE" for signal <pkt_done_write_buf>.
    Set property "KEEP = TRUE" for signal <busy_up_buf>.
    Set property "KEEP = TRUE" for signal <busy_down_buf>.
    Set property "KEEP = TRUE" for signal <rx_read_buf_buf>.
    Set property "KEEP = TRUE" for signal <tx_write_buf_buf>.
    Found 3-bit register for signal <pkt_done_w_tff>.
    Found 1-bit register for signal <rx_ram_sent>.
    Found 1-bit register for signal <tx_ram_written>.
    Found 3-bit register for signal <pkt_done_read_buf>.
    Found 3-bit register for signal <pkt_done_write_buf>.
    Found 1-bit register for signal <req_send_tff>.
    Found 3-bit register for signal <req_send_buf>.
    Found 2-bit register for signal <pkt_rdy_ipb_clk.pkt_rdy_buf<1:0>>.
    Found 1-bit register for signal <pkt_rdy>.
    Found 2-bit register for signal <enable_buf>.
    Found 2-bit register for signal <rarp_buf>.
    Found 2-bit register for signal <we_buf>.
    Found 2-bit register for signal <rst_ipb_buf>.
    Found 1-bit register for signal <busy_up_tff>.
    Found 1-bit register for signal <busy_down_tff>.
    Found 1-bit register for signal <busy_buf>.
    Found 3-bit register for signal <busy_up_buf>.
    Found 3-bit register for signal <busy_down_buf>.
    Found 4-bit register for signal <busy_ipb_clk.busy_buf>.
    Found 1-bit register for signal <busy>.
    Found 4-bit register for signal <rx_read_buf_buf>.
    Found 4-bit register for signal <rx_read_buffer>.
    Found 4-bit register for signal <tx_write_buf_buf>.
    Found 4-bit register for signal <tx_write_buffer>.
    Found 3-bit register for signal <pkt_done_r_tff>.
INFO:Xst:2774 - HDL ADVISOR - KEEP property attached to signal rx_read_buf_buf may hinder XST clustering optimizations.
INFO:Xst:2774 - HDL ADVISOR - KEEP property attached to signal tx_write_buf_buf may hinder XST clustering optimizations.
    Summary:
	inferred  59 D-type flip-flop(s).
	inferred   7 Multiplexer(s).
Unit <udp_clock_crossing_if> synthesized.

Synthesizing Unit <transactor>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/transactor.vhd".
    Summary:
	no macro.
Unit <transactor> synthesized.

Synthesizing Unit <transactor_if>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/transactor_if.vhd".
    Found 1-bit register for signal <dinit_d>.
    Found 1-bit register for signal <dnext_d>.
    Found 1-bit register for signal <dsel>.
    Found 32-bit register for signal <rxf>.
    Found 3-bit register for signal <state>.
    Found 1-bit register for signal <start_d>.
    Found 16-bit register for signal <hlen>.
    Found 16-bit register for signal <blen>.
    Found 12-bit register for signal <waddr>.
    Found 16-bit register for signal <rctr>.
    Found 16-bit register for signal <wctr>.
    Found 12-bit register for signal <haddr>.
    Found 1-bit register for signal <first>.
    Found 12-bit register for signal <raddr>.
    Found finite state machine <FSM_0> for signal <state>.
    -----------------------------------------------------------------------
    | States             | 7                                              |
    | Transitions        | 15                                             |
    | Inputs             | 8                                              |
    | Outputs            | 6                                              |
    | Clock              | clk (rising_edge)                              |
    | Reset              | rst (positive)                                 |
    | Reset type         | synchronous                                    |
    | Reset State        | st_idle                                        |
    | Power Up State     | st_idle                                        |
    | Encoding           | auto                                           |
    | Implementation     | LUT                                            |
    -----------------------------------------------------------------------
    Found 12-bit adder for signal <raddr[11]_GND_299_o_add_0_OUT> created at line 1241.
    Found 12-bit adder for signal <waddr[11]_GND_299_o_add_31_OUT> created at line 1241.
    Found 16-bit adder for signal <rctr[15]_GND_299_o_add_39_OUT> created at line 1241.
    Found 16-bit adder for signal <wctr[15]_GND_299_o_add_44_OUT> created at line 1241.
    Found 16-bit comparator equal for signal <rctr[15]_hlen[15]_equal_14_o> created at line 98
    Found 16-bit comparator greater for signal <blen[15]_rctr[15]_LessThan_60_o> created at line 177
    Summary:
	inferred   4 Adder/Subtractor(s).
	inferred 137 D-type flip-flop(s).
	inferred   2 Comparator(s).
	inferred   8 Multiplexer(s).
	inferred   1 Finite State Machine(s).
Unit <transactor_if> synthesized.

Synthesizing Unit <transactor_sm>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/transactor_sm.vhd".
    Found 1-bit register for signal <rx_ready_d>.
    Found 32-bit register for signal <hdr>.
    Found 32-bit register for signal <addr>.
    Found 8-bit register for signal <words_todo>.
    Found 8-bit register for signal <words_done>.
    Found 8-bit register for signal <timer>.
    Found 1-bit register for signal <rmw_write>.
    Found 32-bit register for signal <rmw_coeff>.
    Found 32-bit register for signal <rmw_result>.
    Found 32-bit register for signal <rmw_input>.
    Found 4-bit register for signal <err_d>.
    Found 3-bit register for signal <state>.
    Found finite state machine <FSM_1> for signal <state>.
    -----------------------------------------------------------------------
    | States             | 6                                              |
    | Transitions        | 18                                             |
    | Inputs             | 10                                             |
    | Outputs            | 10                                             |
    | Clock              | clk (rising_edge)                              |
    | Reset              | rst (positive)                                 |
    | Reset type         | synchronous                                    |
    | Reset State        | st_idle                                        |
    | Power Up State     | st_idle                                        |
    | Encoding           | auto                                           |
    | Implementation     | LUT                                            |
    -----------------------------------------------------------------------
    Found 32-bit adder for signal <addr[31]_GND_300_o_add_22_OUT> created at line 1241.
    Found 8-bit adder for signal <words_done[7]_GND_300_o_add_33_OUT> created at line 1241.
    Found 8-bit adder for signal <timer[7]_GND_300_o_add_38_OUT> created at line 1241.
    Found 32-bit adder for signal <rmw_input[31]_rx_data[31]_add_44_OUT> created at line 166.
    Found 8-bit subtractor for signal <GND_300_o_GND_300_o_sub_29_OUT<7:0>> created at line 1308.
    Found 4-bit 4-to-1 multiplexer for signal <_n0265> created at line 61.
    Summary:
	inferred   5 Adder/Subtractor(s).
	inferred 190 D-type flip-flop(s).
	inferred   9 Multiplexer(s).
	inferred   1 Finite State Machine(s).
Unit <transactor_sm> synthesized.

Synthesizing Unit <transactor_cfg>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/transactor_cfg.vhd".
    Found 128-bit register for signal <vec_out>.
    Found 32-bit adder for signal <n0180> created at line 46.
    Summary:
	inferred   1 Adder/Subtractor(s).
	inferred 128 D-type flip-flop(s).
	inferred 128 Multiplexer(s).
Unit <transactor_cfg> synthesized.

Synthesizing Unit <stretcher>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/stretcher.vhd".
INFO:Xst:3210 - "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/stretcher.vhd" line 27: Output port <d17> of the instance <clkdiv> is unconnected or connected to loadless signal.
INFO:Xst:3210 - "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/ipbus_core/hdl/stretcher.vhd" line 27: Output port <d28> of the instance <clkdiv> is unconnected or connected to loadless signal.
    Found 1-bit register for signal <d_sync_d>.
    Found 1-bit register for signal <d_edge>.
    Found 1-bit register for signal <d25_d>.
    Found 1-bit register for signal <q_i>.
    Found 1-bit register for signal <d_sync>.
    Summary:
	inferred   5 D-type flip-flop(s).
Unit <stretcher> synthesized.

Synthesizing Unit <clock_div>.
    Related source file is "/home/ise/D_DRIVE/amc13-firmware/src/common/IPBUS/clock_div.vhd".
    Found 28-bit register for signal <cnt>.
    Found 1-bit register for signal <d28>.
    Found 1-bit register for signal <d25>.
    Found 1-bit register for signal <d17>.
    Found 28-bit adder for signal <cnt[27]_GND_333_o_add_0_OUT> created at line 53.
    Summary:
	inferred   1 Adder/Subtractor(s).
	inferred  31 D-type flip-flop(s).
Unit <clock_div> synthesized.

Synthesizing Unit <reboot>.
    Related source file is "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/reboot.vhd".
    Found 1-bit register for signal <en_ICAP_b>.
    Found 16-bit register for signal <ICAP_Di>.
    Found 4-bit register for signal <ICAP_a>.
    Found 4-bit adder for signal <ICAP_a[3]_GND_364_o_add_1_OUT> created at line 56.
    Found 16x16-bit Read Only RAM for signal <ICAP_a[3]_GND_364_o_wide_mux_6_OUT>
    Summary:
	inferred   1 RAM(s).
	inferred   1 Adder/Subtractor(s).
	inferred  21 D-type flip-flop(s).
	inferred   1 Multiplexer(s).
Unit <reboot> synthesized.

Synthesizing Unit <BRAM_SDP_MACRO_1>.
    Related source file is "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd".
        BRAM_SIZE = "18Kb"
        DEVICE = "SPARTAN6"
        DO_REG = 0
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        INIT = "000000000000000000000000000000000000000000000000000000000000000000000000"
        INIT_FILE = "NONE"
        READ_WIDTH = 32
        WRITE_MODE = "WRITE_FIRST"
        WRITE_WIDTH = 32
        SIM_COLLISION_CHECK = "ALL"
        SIM_MODE = "SAFE"
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WARNING:Xst:2935 - Signal 'dip_pattern', unconnected in block 'BRAM_SDP_MACRO_1', is tied to its initial value (0000).
    Summary:
	no macro.
Unit <BRAM_SDP_MACRO_1> synthesized.

Synthesizing Unit <BRAM_SDP_MACRO_2>.
    Related source file is "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_SDP_MACRO.vhd".
        BRAM_SIZE = "9Kb"
        DEVICE = "SPARTAN6"
        DO_REG = 0
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        INIT = "000000000000000000000000000000000000000000000000000000000000000000000000"
        INIT_FILE = "NONE"
        READ_WIDTH = 12
        WRITE_MODE = "WRITE_FIRST"
        WRITE_WIDTH = 12
        SIM_COLLISION_CHECK = "ALL"
        SIM_MODE = "SAFE"
        SRVAL = "000000000000000000000000000000000000000000000000000000000000000000000000"
WARNING:Xst:2935 - Signal 'di_pattern<15:12>', unconnected in block 'BRAM_SDP_MACRO_2', is tied to its initial value (0000).
WARNING:Xst:2935 - Signal 'dip_pattern', unconnected in block 'BRAM_SDP_MACRO_2', is tied to its initial value (00).
    Summary:
	no macro.
Unit <BRAM_SDP_MACRO_2> synthesized.

Synthesizing Unit <trig_data>.
    Related source file is "/home/ise/D_DRIVE/Design_collection/AMC13_fw/T2new/trig_data.vhd".
    Set property "IOB = FALSE" for signal <d>.
    Found 1-bit register for signal <o<2>>.
    Found 1-bit register for signal <o<0>>.
    Found 1-bit register for signal <buffer_dinA>.
    Found 1-bit register for signal <buffer_dinB>.
    Found 1-bit register for signal <twinmux_ra>.
    Found 9-bit register for signal <d>.
    Found 1-bit 8-to-1 multiplexer for signal <dl[7]_d[8]_Mux_0_o> created at line 86.
    Summary:
	inferred  14 D-type flip-flop(s).
	inferred   1 Multiplexer(s).
Unit <trig_data> synthesized.

Synthesizing Unit <BRAM_TDP_MACRO_3>.
    Related source file is "/build/xfndry10/P.20131013/rtf/devlib/vhdl/src/unimacro/BRAM_TDP_MACRO.vhd".
        BRAM_SIZE = "18Kb"
        DEVICE = "SPARTAN6"
        DOA_REG = 0
        DOB_REG = 0
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        INIT_A = "000000000000000000000000000000000000"
        INIT_B = "000000000000000000000000000000000000"
        INIT_FILE = "NONE"
        READ_WIDTH_A = 32
        READ_WIDTH_B = 16
        SIM_COLLISION_CHECK = "ALL"
        SIM_MODE = "SAFE"
        SRVAL_A = "000000000000000000000000000000000000"
        SRVAL_B = "000000000000000000000000000000000000"
        WRITE_MODE_A = "WRITE_FIRST"
        WRITE_MODE_B = "WRITE_FIRST"
        WRITE_WIDTH_A = 32
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WARNING:Xst:2935 - Signal 'dib_pattern<31:16>', unconnected in block 'BRAM_TDP_MACRO_3', is tied to its initial value (0000000000000000).
WARNING:Xst:2935 - Signal 'dipa_pattern', unconnected in block 'BRAM_TDP_MACRO_3', is tied to its initial value (0000).
WARNING:Xst:2935 - Signal 'dipb_pattern', unconnected in block 'BRAM_TDP_MACRO_3', is tied to its initial value (0000).
    Summary:
	no macro.
Unit <BRAM_TDP_MACRO_3> synthesized.

=========================================================================
HDL Synthesis Report

Macro Statistics
# RAMs                                                 : 7
 16x16-bit single-port Read Only RAM                   : 1
 4096x8-bit dual-port RAM                              : 1
 8192x32-bit dual-port RAM                             : 1
 8192x8-bit dual-port RAM                              : 4
# Adders/Subtractors                                   : 83
 1-bit adder                                           : 2
 11-bit adder                                          : 2
 12-bit adder                                          : 5
 13-bit adder                                          : 3
 16-bit adder                                          : 24
 2-bit adder                                           : 2
 20-bit adder                                          : 2
 24-bit adder                                          : 2
 27-bit adder                                          : 1
 28-bit adder                                          : 2
 3-bit adder                                           : 4
 32-bit adder                                          : 4
 4-bit adder                                           : 8
 4-bit subtractor                                      : 1
 5-bit adder                                           : 3
 6-bit adder                                           : 4
 6-bit subtractor                                      : 1
 7-bit adder                                           : 1
 8-bit adder                                           : 5
 8-bit subtractor                                      : 1
 9-bit adder                                           : 6
# Registers                                            : 787
 1-bit register                                        : 427
 10-bit register                                       : 1
 11-bit register                                       : 3
 112-bit register                                      : 1
 12-bit register                                       : 7
 128-bit register                                      : 8
 13-bit register                                       : 33
 14-bit register                                       : 1
 16-bit register                                       : 81
 2-bit register                                        : 23
 20-bit register                                       : 3
 24-bit register                                       : 5
 27-bit register                                       : 1
 28-bit register                                       : 2
 3-bit register                                        : 14
 32-bit register                                       : 26
 336-bit register                                      : 1
 34-bit register                                       : 1
 36-bit register                                       : 1
 38-bit register                                       : 2
 4-bit register                                        : 25
 42-bit register                                       : 3
 45-bit register                                       : 2
 48-bit register                                       : 4
 5-bit register                                        : 9
 57-bit register                                       : 1
 6-bit register                                        : 14
 7-bit register                                        : 6
 76-bit register                                       : 2
 8-bit register                                        : 53
 9-bit register                                        : 27
# Comparators                                          : 33
 13-bit comparator equal                               : 1
 16-bit comparator equal                               : 17
 16-bit comparator greater                             : 1
 27-bit comparator equal                               : 1
 6-bit comparator equal                                : 1
 8-bit comparator not equal                            : 11
 9-bit comparator equal                                : 1
# Multiplexers                                         : 1262
 1-bit 16-to-1 multiplexer                             : 6
 1-bit 2-to-1 multiplexer                              : 872
 1-bit 3-to-1 multiplexer                              : 2
 1-bit 8-to-1 multiplexer                              : 14
 10-bit 2-to-1 multiplexer                             : 1
 112-bit 2-to-1 multiplexer                            : 1
 12-bit 2-to-1 multiplexer                             : 5
 128-bit 2-to-1 multiplexer                            : 6
 128-bit 4-to-1 multiplexer                            : 1
 13-bit 2-to-1 multiplexer                             : 40
 13-bit 3-to-1 multiplexer                             : 1
 16-bit 16-to-1 multiplexer                            : 1
 16-bit 2-to-1 multiplexer                             : 67
 16-bit 4-to-1 multiplexer                             : 1
 17-bit 2-to-1 multiplexer                             : 1
 2-bit 2-to-1 multiplexer                              : 12
 2-bit 3-to-1 multiplexer                              : 1
 24-bit 2-to-1 multiplexer                             : 4
 27-bit 2-to-1 multiplexer                             : 1
 28-bit 2-to-1 multiplexer                             : 1
 3-bit 2-to-1 multiplexer                              : 8
 3-bit 8-to-1 multiplexer                              : 1
 32-bit 16-to-1 multiplexer                            : 2
 32-bit 2-to-1 multiplexer                             : 37
 32-bit 4-to-1 multiplexer                             : 2
 34-bit 2-to-1 multiplexer                             : 1
 36-bit 2-to-1 multiplexer                             : 1
 38-bit 2-to-1 multiplexer                             : 2
 4-bit 2-to-1 multiplexer                              : 33
 4-bit 4-to-1 multiplexer                              : 1
 42-bit 2-to-1 multiplexer                             : 3
 45-bit 2-to-1 multiplexer                             : 2
 48-bit 2-to-1 multiplexer                             : 5
 5-bit 2-to-1 multiplexer                              : 13
 6-bit 2-to-1 multiplexer                              : 14
 7-bit 2-to-1 multiplexer                              : 5
 8-bit 16-to-1 multiplexer                             : 1
 8-bit 2-to-1 multiplexer                              : 75
 8-bit 4-to-1 multiplexer                              : 2
 9-bit 2-to-1 multiplexer                              : 16
# Tristates                                            : 3
 1-bit tristate buffer                                 : 3
# FSMs                                                 : 2
# Xors                                                 : 178
 1-bit xor13                                           : 1
 1-bit xor2                                            : 108
 1-bit xor3                                            : 24
 1-bit xor4                                            : 22
 1-bit xor5                                            : 13
 1-bit xor6                                            : 6
 16-bit xor2                                           : 1
 16-bit xor4                                           : 1
 8-bit xor2                                            : 2

=========================================================================

=========================================================================
*                       Advanced HDL Synthesis                          *
=========================================================================

Reading core <LinkFIFO.ngc>.
Reading core <gig_eth_pcs_pma_v11_1.ngc>.
Loading core <LinkFIFO> for timing and area information for instance <i_LinkFIFO>.
Loading core <gig_eth_pcs_pma_v11_1> for timing and area information for instance <i_GbE_pcs_pma>.
WARNING:Xst:1710 - FF/Latch <arp_end_addr_7> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <arp_end_addr_6> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <arp_end_addr_4> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <arp_end_addr_2> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <arp_end_addr_1> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <addr_to_set_0> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.we_buffer_0> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <rarp_end_addr_12> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <rarp_end_addr_11> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <rarp_end_addr_10> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <rarp_end_addr_9> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <rarp_end_addr_8> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <rarp_end_addr_7> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <rarp_end_addr_6> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <rarp_end_addr_4> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <rarp_end_addr_2> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <rarp_end_addr_1> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_54> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_46> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_39> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <status_end_addr_12> (without init value) has a constant value of 0 in block <status>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <status_end_addr_11> (without init value) has a constant value of 0 in block <status>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <status_end_addr_10> (without init value) has a constant value of 0 in block <status>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <status_end_addr_9> (without init value) has a constant value of 0 in block <status>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <status_end_addr_8> (without init value) has a constant value of 0 in block <status>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <status_end_addr_7> (without init value) has a constant value of 0 in block <status>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <status_end_addr_4> (without init value) has a constant value of 0 in block <status>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <status_end_addr_2> (without init value) has a constant value of 0 in block <status>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <status_end_addr_1> (without init value) has a constant value of 0 in block <status>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <ip_pkt.msk_data_7> (without init value) has a constant value of 1 in block <rx_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <ip_pkt.msk_data_5> (without init value) has a constant value of 1 in block <rx_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <ip_pkt.msk_data_4> (without init value) has a constant value of 1 in block <rx_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <ip_pkt.msk_data_3> (without init value) has a constant value of 1 in block <rx_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <ip_pkt.msk_data_2> (without init value) has a constant value of 1 in block <rx_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <ip_pkt.msk_data_1> (without init value) has a constant value of 1 in block <rx_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <ip_pkt.msk_data_0> (without init value) has a constant value of 1 in block <rx_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <arp_end_addr_12> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <arp_end_addr_11> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <arp_end_addr_10> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <arp_end_addr_9> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <arp_end_addr_8> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_17> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_16> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_15> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_14> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_13> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_12> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_11> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_10> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_9> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_8> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_7> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_6> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_5> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_4> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_3> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_2> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_1> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_0> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <addrap_13> has a constant value of 0 in block <i_flash>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <addrap_12> has a constant value of 0 in block <i_flash>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <addra_12> has a constant value of 0 in block <i_flash>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_38> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_37> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_36> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_35> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_34> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_33> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_32> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_31> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_30> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_29> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_28> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_27> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_26> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_25> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_24> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_23> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_22> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_21> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_20> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_19> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_18> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:2677 - Node <address_11> of sequential type is unconnected in block <payload>.
WARNING:Xst:2677 - Node <address_12> of sequential type is unconnected in block <payload>.
WARNING:Xst:2677 - Node <addra_11> of sequential type is unconnected in block <rx_ram_mux>.
WARNING:Xst:2677 - Node <addra_12> of sequential type is unconnected in block <rx_ram_mux>.
WARNING:Xst:2677 - Node <hdr_0> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <hdr_1> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <hdr_2> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <hdr_3> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <hdr_8> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <hdr_9> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <hdr_10> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <hdr_11> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <hdr_12> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <hdr_13> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <hdr_14> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <hdr_15> of sequential type is unconnected in block <sm>.
WARNING:Xst:2404 -  FFs/Latches <rarp_end_addr<12:6>> (without init value) have a constant value of 0 in block <udp_rarp_block>.
WARNING:Xst:2404 -  FFs/Latches <arp_end_addr<12:6>> (without init value) have a constant value of 0 in block <udp_build_arp>.
WARNING:Xst:2404 -  FFs/Latches <status_end_addr<12:7>> (without init value) have a constant value of 0 in block <udp_build_status>.

Synthesizing (advanced) Unit <AMC13_T2>.
The following registers are absorbed into counter <RxV6Cntr>: 1 register on signal <RxV6Cntr>.
The following registers are absorbed into counter <div>: 1 register on signal <div>.
The following registers are absorbed into counter <DNA_cntr>: 1 register on signal <DNA_cntr>.
The following registers are absorbed into counter <rec_cntr>: 1 register on signal <rec_cntr>.
The following registers are absorbed into counter <Bcnt>: 1 register on signal <Bcnt>.
The following registers are absorbed into counter <TTC_cntr>: 1 register on signal <TTC_cntr>.
The following registers are absorbed into counter <cmd_list_ra>: 1 register on signal <cmd_list_ra>.
The following registers are absorbed into counter <cmd_list_wap>: 1 register on signal <cmd_list_wap>.
The following registers are absorbed into counter <BcntErr_cnt>: 1 register on signal <BcntErr_cnt>.
The following registers are absorbed into counter <SinErr_cnt>: 1 register on signal <SinErr_cnt>.
The following registers are absorbed into counter <DbErr_cnt>: 1 register on signal <DbErr_cnt>.
The following registers are absorbed into counter <L1A_cnt>: 1 register on signal <L1A_cnt>.
The following registers are absorbed into counter <BC0_cnt>: 1 register on signal <BC0_cnt>.
The following registers are absorbed into counter <TTCcmdCntr_1>: 1 register on signal <TTCcmdCntr_1>.
The following registers are absorbed into counter <TTCcmdCntr_0>: 1 register on signal <TTCcmdCntr_0>.
The following registers are absorbed into counter <TTCcmdCntr_2>: 1 register on signal <TTCcmdCntr_2>.
The following registers are absorbed into counter <TTCcmdCntr_3>: 1 register on signal <TTCcmdCntr_3>.
The following registers are absorbed into counter <TTCcmdCntr_4>: 1 register on signal <TTCcmdCntr_4>.
The following registers are absorbed into counter <TTCcmdCntr_5>: 1 register on signal <TTCcmdCntr_5>.
The following registers are absorbed into counter <TTCcmdCntr_6>: 1 register on signal <TTCcmdCntr_6>.
The following registers are absorbed into counter <TTCcmdCntr_8>: 1 register on signal <TTCcmdCntr_8>.
The following registers are absorbed into counter <TTCcmdCntr_7>: 1 register on signal <TTCcmdCntr_7>.
The following registers are absorbed into counter <TTCcmdCntr_9>: 1 register on signal <TTCcmdCntr_9>.
The following registers are absorbed into counter <TTCcmdCntr_10>: 1 register on signal <TTCcmdCntr_10>.
The following registers are absorbed into counter <TTCcmdCntr_11>: 1 register on signal <TTCcmdCntr_11>.
The following registers are absorbed into counter <TTCcmdCntr_12>: 1 register on signal <TTCcmdCntr_12>.
The following registers are absorbed into counter <TTCcmdCntr_13>: 1 register on signal <TTCcmdCntr_13>.
The following registers are absorbed into counter <TTCcmdCntr_15>: 1 register on signal <TTCcmdCntr_15>.
The following registers are absorbed into counter <TTCcmdCntr_14>: 1 register on signal <TTCcmdCntr_14>.
The following registers are absorbed into counter <OC_cnt>: 1 register on signal <OC_cnt>.
The following registers are absorbed into counter <TTC_history_wa>: 1 register on signal <TTC_history_wa>.
The following registers are absorbed into counter <buffer_wa>: 1 register on signal <buffer_wa>.
The following registers are absorbed into counter <T3_L1A_cnt>: 1 register on signal <T3_L1A_cnt>.
The following registers are absorbed into counter <conf_cntr>: 1 register on signal <conf_cntr>.
The following registers are absorbed into counter <DNA_div>: 1 register on signal <DNA_div>.
The following registers are absorbed into counter <ipbclk_cntr>: 1 register on signal <ipbclk_cntr>.
Unit <AMC13_T2> synthesized (advanced).

Synthesizing (advanced) Unit <GTP_if>.
The following registers are absorbed into counter <wait_cntr>: 1 register on signal <wait_cntr>.
Unit <GTP_if> synthesized (advanced).

Synthesizing (advanced) Unit <clock_div>.
The following registers are absorbed into counter <cnt>: 1 register on signal <cnt>.
Unit <clock_div> synthesized (advanced).

Synthesizing (advanced) Unit <reboot>.
The following registers are absorbed into counter <ICAP_a>: 1 register on signal <ICAP_a>.
INFO:Xst:3217 - HDL ADVISOR - Register <ICAP_Di> currently described with an asynchronous reset, could be combined with distributed RAM <Mram_ICAP_a[3]_GND_364_o_wide_mux_6_OUT> for implementation on block RAM resources if you made this reset synchronous instead.
    -----------------------------------------------------------------------
    | ram_type           | Distributed                         |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 16-word x 16-bit                    |          |
    |     weA            | connected to signal <GND>           | high     |
    |     addrA          | connected to signal <ICAP_a>        |          |
    |     diA            | connected to signal <GND>           |          |
    |     doA            | connected to internal node          |          |
    -----------------------------------------------------------------------
Unit <reboot> synthesized (advanced).

Synthesizing (advanced) Unit <soft_emac>.
The following registers are absorbed into counter <sel_FCS>: 1 register on signal <sel_FCS>.
The following registers are absorbed into counter <hdr_cnt>: 1 register on signal <hdr_cnt>.
The following registers are absorbed into counter <tx_byte_cnt>: 1 register on signal <tx_byte_cnt>.
The following registers are absorbed into counter <tx_header>: 1 register on signal <tx_header>.
The following registers are absorbed into counter <gap_cnt>: 1 register on signal <gap_cnt>.
The following registers are absorbed into counter <rx_byte_cnt>: 1 register on signal <rx_byte_cnt>.
Unit <soft_emac> synthesized (advanced).

Synthesizing (advanced) Unit <transactor_if>.
The following registers are absorbed into counter <waddr>: 1 register on signal <waddr>.
The following registers are absorbed into counter <rctr>: 1 register on signal <rctr>.
The following registers are absorbed into counter <wctr>: 1 register on signal <wctr>.
The following registers are absorbed into counter <raddr>: 1 register on signal <raddr>.
Unit <transactor_if> synthesized (advanced).

Synthesizing (advanced) Unit <transactor_sm>.
The following registers are absorbed into counter <addr>: 1 register on signal <addr>.
The following registers are absorbed into counter <words_todo>: 1 register on signal <words_todo>.
The following registers are absorbed into counter <timer>: 1 register on signal <timer>.
The following registers are absorbed into counter <words_done>: 1 register on signal <words_done>.
Unit <transactor_sm> synthesized (advanced).

Synthesizing (advanced) Unit <udp_DualPortRAM>.
INFO:Xst:3226 - The RAM <Mram_ram> will be implemented as a BLOCK RAM, absorbing the following register(s): <dob>
    -----------------------------------------------------------------------
    | ram_type           | Block                               |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 4096-word x 8-bit                   |          |
    |     mode           | write-first                         |          |
    |     clkA           | connected to signal <ClkA>          | rise     |
    |     weA            | connected to signal <wea>           | high     |
    |     addrA          | connected to signal <addra>         |          |
    |     diA            | connected to signal <dia>           |          |
    -----------------------------------------------------------------------
    | optimization       | speed                               |          |
    -----------------------------------------------------------------------
    | Port B                                                              |
    |     aspect ratio   | 4096-word x 8-bit                   |          |
    |     mode           | write-first                         |          |
    |     clkB           | connected to signal <ClkB>          | rise     |
    |     addrB          | connected to signal <addrb>         |          |
    |     doB            | connected to signal <dob>           |          |
    -----------------------------------------------------------------------
    | optimization       | speed                               |          |
    -----------------------------------------------------------------------
Unit <udp_DualPortRAM> synthesized (advanced).

Synthesizing (advanced) Unit <udp_DualPortRAM_rx>.
INFO:Xst:3226 - The RAM <Mram_ram1> will be implemented as a BLOCK RAM, absorbing the following register(s): <rx_dob_sliced>
    -----------------------------------------------------------------------
    | ram_type           | Block                               |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 8192-word x 8-bit                   |          |
    |     mode           | write-first                         |          |
    |     clkA           | connected to signal <clk125>        | rise     |
    |     weA            | connected to internal node          | high     |
    |     addrA          | connected to signal <rx_addra<14:2>> |          |
    |     diA            | connected to signal <rx_dia>        |          |
    -----------------------------------------------------------------------
    | optimization       | speed                               |          |
    -----------------------------------------------------------------------
    | Port B                                                              |
    |     aspect ratio   | 8192-word x 8-bit                   |          |
    |     mode           | write-first                         |          |
    |     clkB           | connected to signal <clk>           | rise     |
    |     addrB          | connected to signal <rx_addrb>      |          |
    |     doB            | connected to signal <rx_dob>        |          |
    -----------------------------------------------------------------------
    | optimization       | speed                               |          |
    -----------------------------------------------------------------------
INFO:Xst:3226 - The RAM <Mram_ram2> will be implemented as a BLOCK RAM, absorbing the following register(s): <rx_dob>
    -----------------------------------------------------------------------
    | ram_type           | Block                               |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 8192-word x 8-bit                   |          |
    |     mode           | write-first                         |          |
    |     clkA           | connected to signal <clk125>        | rise     |
    |     weA            | connected to internal node          | high     |
    |     addrA          | connected to signal <rx_addra<14:2>> |          |
    |     diA            | connected to signal <rx_dia>        |          |
    -----------------------------------------------------------------------
    | optimization       | speed                               |          |
    -----------------------------------------------------------------------
    | Port B                                                              |
    |     aspect ratio   | 8192-word x 8-bit                   |          |
    |     mode           | write-first                         |          |
    |     clkB           | connected to signal <clk>           | rise     |
    |     addrB          | connected to signal <rx_addrb>      |          |
    |     doB            | connected to signal <rx_dob>        |          |
    -----------------------------------------------------------------------
    | optimization       | speed                               |          |
    -----------------------------------------------------------------------
INFO:Xst:3226 - The RAM <Mram_ram3> will be implemented as a BLOCK RAM, absorbing the following register(s): <rx_dob_sliced_sliced>
    -----------------------------------------------------------------------
    | ram_type           | Block                               |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 8192-word x 8-bit                   |          |
    |     mode           | write-first                         |          |
    |     clkA           | connected to signal <clk125>        | rise     |
    |     weA            | connected to internal node          | high     |
    |     addrA          | connected to signal <rx_addra<14:2>> |          |
    |     diA            | connected to signal <rx_dia>        |          |
    -----------------------------------------------------------------------
    | optimization       | speed                               |          |
    -----------------------------------------------------------------------
    | Port B                                                              |
    |     aspect ratio   | 8192-word x 8-bit                   |          |
    |     mode           | write-first                         |          |
    |     clkB           | connected to signal <clk>           | rise     |
    |     addrB          | connected to signal <rx_addrb>      |          |
    |     doB            | connected to signal <rx_dob>        |          |
    -----------------------------------------------------------------------
    | optimization       | speed                               |          |
    -----------------------------------------------------------------------
INFO:Xst:3226 - The RAM <Mram_ram4> will be implemented as a BLOCK RAM, absorbing the following register(s): <rx_dob_sliced_sliced_sliced>
    -----------------------------------------------------------------------
    | ram_type           | Block                               |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 8192-word x 8-bit                   |          |
    |     mode           | write-first                         |          |
    |     clkA           | connected to signal <clk125>        | rise     |
    |     weA            | connected to internal node          | high     |
    |     addrA          | connected to signal <rx_addra<14:2>> |          |
    |     diA            | connected to signal <rx_dia>        |          |
    -----------------------------------------------------------------------
    | optimization       | speed                               |          |
    -----------------------------------------------------------------------
    | Port B                                                              |
    |     aspect ratio   | 8192-word x 8-bit                   |          |
    |     mode           | write-first                         |          |
    |     clkB           | connected to signal <clk>           | rise     |
    |     addrB          | connected to signal <rx_addrb>      |          |
    |     doB            | connected to signal <rx_dob>        |          |
    -----------------------------------------------------------------------
    | optimization       | speed                               |          |
    -----------------------------------------------------------------------
Unit <udp_DualPortRAM_rx> synthesized (advanced).

Synthesizing (advanced) Unit <udp_DualPortRAM_tx>.
INFO:Xst:3226 - The RAM <Mram_ram> will be implemented as a BLOCK RAM, absorbing the following register(s): <ram_out>
    -----------------------------------------------------------------------
    | ram_type           | Block                               |          |
    -----------------------------------------------------------------------
    | Port A                                                              |
    |     aspect ratio   | 8192-word x 32-bit                  |          |
    |     mode           | write-first                         |          |
    |     clkA           | connected to signal <clk>           | rise     |
    |     weA            | connected to signal <tx_wea>        | high     |
    |     addrA          | connected to signal <tx_addra>      |          |
    |     diA            | connected to signal <tx_dia>        |          |
    -----------------------------------------------------------------------
    | optimization       | speed                               |          |
    -----------------------------------------------------------------------
    | Port B                                                              |
    |     aspect ratio   | 8192-word x 32-bit                  |          |
    |     mode           | write-first                         |          |
    |     clkB           | connected to signal <clk125>        | rise     |
    |     addrB          | connected to signal <tx_addrb<14:2>> |          |
    |     doB            | connected to signal <ram_out>       |          |
    -----------------------------------------------------------------------
    | optimization       | speed                               |          |
    -----------------------------------------------------------------------
Unit <udp_DualPortRAM_tx> synthesized (advanced).

Synthesizing (advanced) Unit <udp_rarp_block>.
The following registers are absorbed into counter <tick_counter.counter_int>: 1 register on signal <tick_counter.counter_int>.
The following registers are absorbed into counter <rarp_req_block.req_count>: 1 register on signal <rarp_req_block.req_count>.
Unit <udp_rarp_block> synthesized (advanced).

Synthesizing (advanced) Unit <udp_status_buffer>.
The following registers are absorbed into counter <tick>: 1 register on signal <tick>.
Unit <udp_status_buffer> synthesized (advanced).
WARNING:Xst:2677 - Node <hdr_0> of sequential type is unconnected in block <transactor_sm>.
WARNING:Xst:2677 - Node <hdr_1> of sequential type is unconnected in block <transactor_sm>.
WARNING:Xst:2677 - Node <hdr_2> of sequential type is unconnected in block <transactor_sm>.
WARNING:Xst:2677 - Node <hdr_3> of sequential type is unconnected in block <transactor_sm>.
WARNING:Xst:2677 - Node <hdr_8> of sequential type is unconnected in block <transactor_sm>.
WARNING:Xst:2677 - Node <hdr_9> of sequential type is unconnected in block <transactor_sm>.
WARNING:Xst:2677 - Node <hdr_10> of sequential type is unconnected in block <transactor_sm>.
WARNING:Xst:2677 - Node <hdr_11> of sequential type is unconnected in block <transactor_sm>.
WARNING:Xst:2677 - Node <hdr_12> of sequential type is unconnected in block <transactor_sm>.
WARNING:Xst:2677 - Node <hdr_13> of sequential type is unconnected in block <transactor_sm>.
WARNING:Xst:2677 - Node <hdr_14> of sequential type is unconnected in block <transactor_sm>.
WARNING:Xst:2677 - Node <hdr_15> of sequential type is unconnected in block <transactor_sm>.
WARNING:Xst:2677 - Node <inc_TTCcmdCntr_0> of sequential type is unconnected in block <AMC13_T2>.

=========================================================================
Advanced HDL Synthesis Report

Macro Statistics
# RAMs                                                 : 7
 16x16-bit single-port distributed Read Only RAM       : 1
 4096x8-bit dual-port block RAM                        : 1
 8192x32-bit dual-port block RAM                       : 1
 8192x8-bit dual-port block RAM                        : 4
# Adders/Subtractors                                   : 26
 1-bit adder                                           : 2
 12-bit adder                                          : 2
 13-bit adder                                          : 3
 16-bit adder                                          : 2
 24-bit adder                                          : 1
 3-bit adder                                           : 1
 32-bit adder                                          : 1
 4-bit adder                                           : 4
 4-bit subtractor                                      : 1
 5-bit adder                                           : 1
 6-bit adder                                           : 2
 7-bit adder                                           : 1
 8-bit adder                                           : 1
 9-bit adder                                           : 4
# Counters                                             : 57
 11-bit up counter                                     : 2
 12-bit up counter                                     : 3
 16-bit up counter                                     : 22
 2-bit up counter                                      : 2
 20-bit up counter                                     : 2
 24-bit up counter                                     : 1
 27-bit up counter                                     : 1
 28-bit up counter                                     : 2
 3-bit up counter                                      : 3
 32-bit up counter                                     : 2
 4-bit up counter                                      : 4
 5-bit up counter                                      : 2
 6-bit down counter                                    : 1
 6-bit up counter                                      : 2
 8-bit down counter                                    : 1
 8-bit up counter                                      : 5
 9-bit up counter                                      : 2
# Registers                                            : 5800
 Flip-Flops                                            : 5800
# Comparators                                          : 33
 13-bit comparator equal                               : 1
 16-bit comparator equal                               : 17
 16-bit comparator greater                             : 1
 27-bit comparator equal                               : 1
 6-bit comparator equal                                : 1
 8-bit comparator not equal                            : 11
 9-bit comparator equal                                : 1
# Multiplexers                                         : 1756
 1-bit 16-to-1 multiplexer                             : 46
 1-bit 2-to-1 multiplexer                              : 1234
 1-bit 3-to-1 multiplexer                              : 2
 1-bit 4-to-1 multiplexer                              : 128
 1-bit 8-to-1 multiplexer                              : 14
 10-bit 2-to-1 multiplexer                             : 1
 112-bit 2-to-1 multiplexer                            : 1
 12-bit 2-to-1 multiplexer                             : 4
 128-bit 2-to-1 multiplexer                            : 6
 13-bit 2-to-1 multiplexer                             : 34
 13-bit 3-to-1 multiplexer                             : 1
 16-bit 16-to-1 multiplexer                            : 1
 16-bit 2-to-1 multiplexer                             : 60
 16-bit 4-to-1 multiplexer                             : 1
 17-bit 2-to-1 multiplexer                             : 1
 2-bit 2-to-1 multiplexer                              : 10
 2-bit 3-to-1 multiplexer                              : 1
 24-bit 2-to-1 multiplexer                             : 4
 28-bit 2-to-1 multiplexer                             : 1
 3-bit 2-to-1 multiplexer                              : 8
 3-bit 8-to-1 multiplexer                              : 1
 32-bit 16-to-1 multiplexer                            : 1
 32-bit 2-to-1 multiplexer                             : 33
 32-bit 4-to-1 multiplexer                             : 2
 34-bit 2-to-1 multiplexer                             : 1
 36-bit 2-to-1 multiplexer                             : 1
 38-bit 2-to-1 multiplexer                             : 2
 4-bit 2-to-1 multiplexer                              : 32
 4-bit 4-to-1 multiplexer                              : 1
 42-bit 2-to-1 multiplexer                             : 3
 45-bit 2-to-1 multiplexer                             : 2
 48-bit 2-to-1 multiplexer                             : 4
 5-bit 2-to-1 multiplexer                              : 13
 6-bit 2-to-1 multiplexer                              : 11
 7-bit 2-to-1 multiplexer                              : 3
 8-bit 2-to-1 multiplexer                              : 72
 8-bit 4-to-1 multiplexer                              : 2
 9-bit 2-to-1 multiplexer                              : 14
# FSMs                                                 : 2
# Xors                                                 : 178
 1-bit xor13                                           : 1
 1-bit xor2                                            : 108
 1-bit xor3                                            : 24
 1-bit xor4                                            : 22
 1-bit xor5                                            : 13
 1-bit xor6                                            : 6
 16-bit xor2                                           : 1
 16-bit xor4                                           : 1
 8-bit xor2                                            : 2

=========================================================================

=========================================================================
*                         Low Level Synthesis                           *
=========================================================================
WARNING:Xst:1293 - FF/Latch <addra_12> has a constant value of 0 in block <flash>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <addrap_12> has a constant value of 0 in block <flash>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <addrap_13> has a constant value of 0 in block <flash>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_22> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_23> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_24> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_25> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_26> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_27> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_28> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_29> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_30> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_31> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_32> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_33> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_34> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_35> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_36> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_37> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_38> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_39> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <rarp_end_addr_1> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <rarp_end_addr_2> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <rarp_end_addr_4> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.we_buffer_0> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_0> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_1> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_2> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_3> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_4> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_5> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_6> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_7> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_8> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_9> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_10> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_11> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_12> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_13> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_14> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_15> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_16> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_17> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_18> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_19> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_20> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <data_block.data_buffer_21> (without init value) has a constant value of 0 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <addr_to_set_0> (without init value) has a constant value of 0 in block <udp_build_arp>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <arp_end_addr_1> (without init value) has a constant value of 0 in block <udp_build_arp>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <arp_end_addr_2> (without init value) has a constant value of 0 in block <udp_build_arp>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <arp_end_addr_4> (without init value) has a constant value of 0 in block <udp_build_arp>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <ip_pkt.msk_data_0> (without init value) has a constant value of 1 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ip_pkt.msk_data_1> (without init value) has a constant value of 1 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ip_pkt.msk_data_2> (without init value) has a constant value of 1 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ip_pkt.msk_data_3> (without init value) has a constant value of 1 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ip_pkt.msk_data_4> (without init value) has a constant value of 1 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ip_pkt.msk_data_5> (without init value) has a constant value of 1 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ip_pkt.msk_data_7> (without init value) has a constant value of 1 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <status_end_addr_1> (without init value) has a constant value of 0 in block <udp_build_status>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <status_end_addr_2> (without init value) has a constant value of 0 in block <udp_build_status>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <status_end_addr_4> (without init value) has a constant value of 0 in block <udp_build_status>. This FF/Latch will be trimmed during the optimization process.
Analyzing FSM <MFsm> for best encoding.
Optimizing FSM <i_ipbus/trans/sm/FSM_1> on signal <state[1:3]> with user encoding.
--------------------------
 State        | Encoding
--------------------------
 st_idle      | 000
 st_hdr       | 001
 st_addr      | 010
 st_bus_cycle | 011
 st_rmw_1     | 100
 st_rmw_2     | 101
--------------------------
Analyzing FSM <MFsm> for best encoding.
Optimizing FSM <i_ipbus/trans/iface/FSM_0> on signal <state[1:3]> with gray encoding.
------------------------
 State      | Encoding
------------------------
 st_idle    | 000
 st_first   | 001
 st_hdr     | 011
 st_prebody | 010
 st_body    | 111
 st_done    | 110
 st_gap     | 101
------------------------
WARNING:Xst:1710 - FF/Latch <rarp_req_block.req_end_0> (without init value) has a constant value of 1 in block <udp_rarp_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <next_addr.addr_to_set_buf_0> (without init value) has a constant value of 0 in block <udp_build_arp>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <littleendian.unreliable_data_22> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_20> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_19> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_18> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_17> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_16> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_15> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_14> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_12> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_11> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_10> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_9> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_8> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_7> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_6> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_4> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_3> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_2> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_1> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_0> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.reliable_data_7> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.reliable_data_6> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.reliable_data_4> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.reliable_data_3> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.reliable_data_2> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.reliable_data_1> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <resend.pkt_data_11> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <resend.pkt_data_10> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <resend.pkt_data_8> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <resend.pkt_data_3> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <resend.pkt_data_2> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <resend.pkt_data_0> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <status_request.pkt_data_42> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <status_request.pkt_data_41> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <status_request.pkt_data_34> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <status_request.pkt_data_33> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <status_request.pkt_data_27> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <status_request.pkt_data_26> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <status_request.pkt_data_25> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <status_request.pkt_data_19> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <status_request.pkt_data_18> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <status_request.pkt_data_17> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <status_request.pkt_data_11> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <status_request.pkt_data_10> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <status_request.pkt_data_9> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <status_request.pkt_data_3> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <status_request.pkt_data_2> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <status_request.pkt_data_1> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_27> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_26> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_25> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_24> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.unreliable_data_23> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ipbus_pkt.pkt_data_7> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ipbus_pkt.pkt_data_5> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ipbus_pkt.pkt_data_3> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ipbus_pkt.pkt_data_2> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ipbus_pkt.pkt_data_1> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ping.pkt_data_23> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ping.pkt_data_22> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ping.pkt_data_21> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ping.pkt_data_20> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ping.pkt_data_18> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ping.pkt_data_17> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ping.pkt_data_15> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ping.pkt_data_14> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ping.pkt_data_13> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ping.pkt_data_12> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ping.pkt_data_10> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ping.pkt_data_9> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ping.pkt_data_8> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ping.pkt_data_7> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ping.pkt_data_6> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ping.pkt_data_5> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ping.pkt_data_4> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ping.pkt_data_3> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ping.pkt_data_2> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ping.pkt_data_1> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ping.pkt_data_0> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <littleendian.reliable_data_0> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <bigendian.unreliable_data_27> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <bigendian.unreliable_data_26> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <bigendian.unreliable_data_25> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <bigendian.unreliable_data_24> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <bigendian.unreliable_data_19> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <bigendian.unreliable_data_18> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <bigendian.unreliable_data_17> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <bigendian.unreliable_data_16> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <bigendian.unreliable_data_11> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <bigendian.unreliable_data_10> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <bigendian.unreliable_data_9> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <bigendian.unreliable_data_8> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <bigendian.unreliable_data_3> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <bigendian.unreliable_data_2> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <bigendian.unreliable_data_1> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <bigendian.unreliable_data_0> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <bigendian.reliable_data_3> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <bigendian.reliable_data_2> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <bigendian.reliable_data_1> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <bigendian.reliable_data_0> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ipbus_pkt.pkt_data_21> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ipbus_pkt.pkt_data_19> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ipbus_pkt.pkt_data_18> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ipbus_pkt.pkt_data_13> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ipbus_pkt.pkt_data_11> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <ipbus_pkt.pkt_data_10> (without init value) has a constant value of 0 in block <udp_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <do_cksum.payload_len_15> (without init value) has a constant value of 0 in block <udp_build_payload>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <do_cksum.payload_len_14> (without init value) has a constant value of 0 in block <udp_build_payload>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_to_set_0> (without init value) has a constant value of 0 in block <udp_build_payload>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <address_block.addr_to_set_buf_12> (without init value) has a constant value of 0 in block <udp_build_payload>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <address_block.addr_to_set_buf_11> (without init value) has a constant value of 0 in block <udp_build_payload>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <address_block.addr_to_set_buf_10> (without init value) has a constant value of 0 in block <udp_build_payload>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <address_block.addr_to_set_buf_9> (without init value) has a constant value of 0 in block <udp_build_payload>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <address_block.addr_to_set_buf_8> (without init value) has a constant value of 0 in block <udp_build_payload>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <address_block.addr_to_set_buf_7> (without init value) has a constant value of 0 in block <udp_build_payload>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <address_block.addr_to_set_buf_6> (without init value) has a constant value of 0 in block <udp_build_payload>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <next_addr_block.addr_to_set_buf_12> (without init value) has a constant value of 0 in block <udp_build_payload>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <next_addr_block.addr_to_set_buf_11> (without init value) has a constant value of 0 in block <udp_build_payload>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <next_addr_block.addr_to_set_buf_10> (without init value) has a constant value of 0 in block <udp_build_payload>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <next_addr_block.addr_to_set_buf_9> (without init value) has a constant value of 0 in block <udp_build_payload>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <next_addr_block.addr_to_set_buf_8> (without init value) has a constant value of 0 in block <udp_build_payload>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <next_addr_block.addr_to_set_buf_7> (without init value) has a constant value of 0 in block <udp_build_payload>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <next_addr_block.addr_to_set_buf_6> (without init value) has a constant value of 0 in block <udp_build_payload>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <next_addr_block.addr_to_set_buf_0> (without init value) has a constant value of 0 in block <udp_build_payload>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <address_block.addr_to_set_buf_0> (without init value) has a constant value of 0 in block <udp_build_payload>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <next_addr.addr_to_set_buf_6> (without init value) has a constant value of 0 in block <udp_build_ping>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <next_addr.addr_to_set_buf_7> (without init value) has a constant value of 0 in block <udp_build_ping>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <next_addr.addr_to_set_buf_8> (without init value) has a constant value of 0 in block <udp_build_ping>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <next_addr.addr_to_set_buf_9> (without init value) has a constant value of 0 in block <udp_build_ping>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <next_addr.addr_to_set_buf_10> (without init value) has a constant value of 0 in block <udp_build_ping>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <next_addr.addr_to_set_buf_11> (without init value) has a constant value of 0 in block <udp_build_ping>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <next_addr.addr_to_set_buf_12> (without init value) has a constant value of 0 in block <udp_build_ping>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <int_data_ping_0> (without init value) has a constant value of 0 in block <udp_build_ping>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <int_data_ping_1> (without init value) has a constant value of 0 in block <udp_build_ping>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <int_data_ping_2> (without init value) has a constant value of 0 in block <udp_build_ping>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <int_data_ping_4> (without init value) has a constant value of 0 in block <udp_build_ping>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <int_data_ping_5> (without init value) has a constant value of 0 in block <udp_build_ping>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <int_data_ping_6> (without init value) has a constant value of 0 in block <udp_build_ping>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <int_data_ping_7> (without init value) has a constant value of 0 in block <udp_build_ping>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_to_set_0> (without init value) has a constant value of 0 in block <udp_build_ping>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <next_addr.addr_to_set_buf_0> (without init value) has a constant value of 0 in block <udp_build_ping>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <addr_to_set_0> (without init value) has a constant value of 0 in block <udp_build_status>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_to_set_6> (without init value) has a constant value of 0 in block <udp_build_status>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <next_addr.addr_to_set_buf_0> (without init value) has a constant value of 0 in block <udp_build_status>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <next_addr.addr_to_set_buf_6> (without init value) has a constant value of 0 in block <udp_build_status>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <lo_byte_calc.lo_byte_int_8> (without init value) has a constant value of 0 in block <udp_byte_sum>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <header_99> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_98> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_97> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_96> (without init value) has a constant value of 1 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_95> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_94> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_93> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_92> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_91> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_90> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_89> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_88> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_87> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_86> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_85> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_84> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_83> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_82> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_81> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_80> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_79> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_78> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_77> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_76> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_75> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_74> (without init value) has a constant value of 1 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_73> (without init value) has a constant value of 1 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_72> (without init value) has a constant value of 1 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_127> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_126> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_125> (without init value) has a constant value of 1 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_124> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_123> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_122> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_121> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_120> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_119> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_118> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_117> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_116> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_115> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_114> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_113> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_112> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_111> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_110> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_109> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_108> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_107> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_106> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_105> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_104> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_103> (without init value) has a constant value of 1 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_102> (without init value) has a constant value of 1 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_101> (without init value) has a constant value of 1 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_100> (without init value) has a constant value of 1 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_43> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_42> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_41> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_40> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_39> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_38> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_37> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_36> (without init value) has a constant value of 1 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_35> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_34> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_33> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_32> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_31> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_30> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_29> (without init value) has a constant value of 1 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_28> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_27> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_26> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_25> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_24> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_7> (without init value) has a constant value of 1 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_6> (without init value) has a constant value of 1 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_5> (without init value) has a constant value of 1 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_4> (without init value) has a constant value of 1 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_3> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_2> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_1> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_0> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_71> (without init value) has a constant value of 1 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_70> (without init value) has a constant value of 1 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_69> (without init value) has a constant value of 1 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_68> (without init value) has a constant value of 1 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_67> (without init value) has a constant value of 1 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_66> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_65> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_64> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_63> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_62> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_61> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_60> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_59> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_58> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_57> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_56> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_55> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_54> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_53> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_52> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_51> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_50> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_49> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_48> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_47> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_46> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_45> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <header_44> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <udp_build_data.pay_len_0> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <udp_build_data.pay_len_1> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <udp_build_data.pay_len_13> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <udp_build_data.pay_len_14> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <udp_build_data.pay_len_15> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <err_d_3> (without init value) has a constant value of 0 in block <transactor_sm>. This FF/Latch will be trimmed during the optimization process.
INFO:Xst:1901 - Instance i_DCM_TTCclk in unit i_DCM_TTCclk of type PLL_BASE has been replaced by PLL_ADV
INFO:Xst:1901 - Instance i_TTCclk4x in unit AMC13_T2 of type BUFGCE has been replaced by BUFGMUX
INFO:Xst:1901 - Instance i_TTCclk8x in unit AMC13_T2 of type BUFGCE has been replaced by BUFGMUX
WARNING:Xst:3002 - This design contains one or more registers/latches that are directly
   incompatible with the Spartan6 architecture. The two primary causes of this is
   either a register or latch described with both an asynchronous set and
   asynchronous reset, or a register or latch described with an asynchronous
   set or reset which however has an initialization value of the opposite 
   polarity (i.e. asynchronous reset with an initialization value of 1).
    While this circuit can be built, it creates a sub-optimal implementation
   in terms of area, power and performance. For a more optimal implementation
   Xilinx highly recommends one of the following:

          1) Remove either the set or reset from all registers and latches
             if not needed for required functionality
          2) Modify the code in order to produce a synchronous set
             and/or reset (both is preferred)
          3) Ensure all registers have the same initialization value as the
             described asynchronous set or reset polarity
          4) Use the -async_to_sync option to transform the asynchronous
             set/reset to synchronous operation
             (timing simulation highly recommended when using this option)

  Please refer to http://www.xilinx.com search string "Spartan6 asynchronous set/reset" for more details.

  List of register instances with asynchronous set or reset and opposite initialization value:
    DNA_cntr_5 in unit <AMC13_T2>
    DNA_cntr_4 in unit <AMC13_T2>
    DNA_cntr_3 in unit <AMC13_T2>
    DNA_cntr_0 in unit <AMC13_T2>
    CRC_23 in unit <AMC13_T2>
    CRC_22 in unit <AMC13_T2>
    CRC_21 in unit <AMC13_T2>
    CRC_20 in unit <AMC13_T2>
    CRC_19 in unit <AMC13_T2>
    CRC_18 in unit <AMC13_T2>
    CRC_17 in unit <AMC13_T2>
    CRC_16 in unit <AMC13_T2>
    CRC_15 in unit <AMC13_T2>
    CRC_14 in unit <AMC13_T2>
    CRC_13 in unit <AMC13_T2>
    CRC_12 in unit <AMC13_T2>
    CRC_11 in unit <AMC13_T2>
    CRC_10 in unit <AMC13_T2>
    CRC_9 in unit <AMC13_T2>
    CRC_8 in unit <AMC13_T2>
    CRC_7 in unit <AMC13_T2>
    CRC_6 in unit <AMC13_T2>
    CRC_5 in unit <AMC13_T2>
    CRC_4 in unit <AMC13_T2>
    CRC_3 in unit <AMC13_T2>
    CRC_2 in unit <AMC13_T2>
    CRC_1 in unit <AMC13_T2>
    CRC_0 in unit <AMC13_T2>
    load_DNA_1 in unit <AMC13_T2>
    load_DNA_0 in unit <AMC13_T2>
    TTC_data_1 in unit <AMC13_T2>
    ICAP_Di_15 in unit <reboot>
    ICAP_Di_14 in unit <reboot>
    ICAP_Di_13 in unit <reboot>
    ICAP_Di_12 in unit <reboot>
    ICAP_Di_11 in unit <reboot>
    ICAP_Di_10 in unit <reboot>
    ICAP_Di_9 in unit <reboot>
    ICAP_Di_8 in unit <reboot>
    ICAP_Di_7 in unit <reboot>
    ICAP_Di_6 in unit <reboot>
    ICAP_Di_5 in unit <reboot>
    ICAP_Di_4 in unit <reboot>
    ICAP_Di_3 in unit <reboot>
    ICAP_Di_2 in unit <reboot>
    ICAP_Di_1 in unit <reboot>
    ICAP_Di_0 in unit <reboot>


Optimizing unit <S6Link_GbE> ...

Optimizing unit <S6Link_GbE_tile> ...

Optimizing unit <BRAM_TDP_MACRO_1> ...

Optimizing unit <BRAM_TDP_MACRO_2> ...

Optimizing unit <udp_DualPortRAM> ...

Optimizing unit <transactor> ...

Optimizing unit <BRAM_TDP_MACRO_3> ...

Optimizing unit <BRAM_SDP_MACRO_1> ...

Optimizing unit <BRAM_SDP_MACRO_2> ...

Optimizing unit <AMC13_T2> ...

Optimizing unit <GTP_if> ...

Optimizing unit <soft_emac> ...

Optimizing unit <EthernetCRC> ...

Optimizing unit <flash> ...

Optimizing unit <trig_data> ...

Optimizing unit <ipbus_ctrl> ...

Optimizing unit <UDP_if> ...

Optimizing unit <udp_ipaddr_block> ...

Optimizing unit <udp_rarp_block> ...

Optimizing unit <udp_build_arp> ...

Optimizing unit <udp_packet_parser> ...

Optimizing unit <udp_build_payload> ...

Optimizing unit <udp_build_ping> ...

Optimizing unit <udp_build_resend> ...

Optimizing unit <udp_build_status> ...

Optimizing unit <udp_byte_sum> ...

Optimizing unit <udp_DualPortRAM_tx> ...

Optimizing unit <udp_status_buffer> ...
WARNING:Xst:1710 - FF/Latch <history_block.event_data_4> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <history_block.event_data_5> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <history_5> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <history_13> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <history_21> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <history_29> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <history_37> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <history_45> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <history_53> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <history_61> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <history_69> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <history_77> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <history_85> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <history_93> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <history_101> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <history_109> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <history_117> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <history_125> (without init value) has a constant value of 0 in block <udp_status_buffer>. This FF/Latch will be trimmed during the optimization process.

Optimizing unit <udp_do_rx_reset> ...

Optimizing unit <udp_rxram_mux> ...

Optimizing unit <udp_buffer_selector_1> ...

Optimizing unit <udp_rxram_shim> ...

Optimizing unit <udp_DualPortRAM_rx> ...

Optimizing unit <udp_buffer_selector_2> ...

Optimizing unit <udp_rxtransactor_if> ...

Optimizing unit <udp_tx_mux> ...
WARNING:Xst:1710 - FF/Latch <addr_to_set_12> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_to_set_11> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_to_set_10> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_to_set_9> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_to_set_8> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_to_set_7> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_to_set_6> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_to_set_5> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_to_set_4> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_to_set_3> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_to_set_2> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <addr_to_set_0> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <state_machine.addr_to_set_int_12> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <state_machine.addr_to_set_int_11> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <state_machine.addr_to_set_int_10> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <state_machine.addr_to_set_int_9> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <state_machine.addr_to_set_int_8> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <state_machine.addr_to_set_int_7> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <state_machine.addr_to_set_int_6> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <state_machine.addr_to_set_int_5> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <state_machine.addr_to_set_int_4> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <state_machine.addr_to_set_int_3> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <state_machine.addr_to_set_int_2> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <state_machine.addr_to_set_int_0> (without init value) has a constant value of 0 in block <udp_tx_mux>. This FF/Latch will be trimmed during the optimization process.

Optimizing unit <udp_txtransactor_if> ...

Optimizing unit <udp_clock_crossing_if> ...

Optimizing unit <transactor_sm> ...

Optimizing unit <transactor_if> ...

Optimizing unit <transactor_cfg> ...

Optimizing unit <stretcher> ...

Optimizing unit <clock_div> ...

Optimizing unit <SPI_if> ...

Optimizing unit <reboot> ...
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_46> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <data_block.data_buffer_54> (without init value) has a constant value of 0 in block <RARP_block>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <rarp.pkt_data_6> (without init value) has a constant value of 0 in block <rx_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <rarp.pkt_data_14> (without init value) has a constant value of 0 in block <rx_packet_parser>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:2677 - Node <address_block.addr_int_11> of sequential type is unconnected in block <payload>.
WARNING:Xst:2677 - Node <address_block.addr_int_12> of sequential type is unconnected in block <payload>.
WARNING:Xst:2677 - Node <address_11> of sequential type is unconnected in block <payload>.
WARNING:Xst:2677 - Node <address_12> of sequential type is unconnected in block <payload>.
WARNING:Xst:2677 - Node <addra_11> of sequential type is unconnected in block <rx_ram_mux>.
WARNING:Xst:2677 - Node <addra_12> of sequential type is unconnected in block <rx_ram_mux>.
WARNING:Xst:2677 - Node <clean_block.clean_i_0> of sequential type is unconnected in block <internal_ram_selector>.
WARNING:Xst:2677 - Node <clean_block.clean_i_1> of sequential type is unconnected in block <internal_ram_selector>.
WARNING:Xst:2677 - Node <clean_0> of sequential type is unconnected in block <internal_ram_selector>.
WARNING:Xst:2677 - Node <clean_1> of sequential type is unconnected in block <internal_ram_selector>.
WARNING:Xst:2677 - Node <addr_16> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <addr_17> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <addr_18> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <addr_19> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <addr_20> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <addr_21> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <addr_22> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <addr_23> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <addr_24> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <addr_25> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <addr_26> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <addr_27> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <addr_28> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <addr_29> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <addr_30> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <addr_31> of sequential type is unconnected in block <sm>.
WARNING:Xst:2677 - Node <haddr_9> of sequential type is unconnected in block <iface>.
WARNING:Xst:2677 - Node <haddr_10> of sequential type is unconnected in block <iface>.
WARNING:Xst:2677 - Node <haddr_11> of sequential type is unconnected in block <iface>.
WARNING:Xst:2677 - Node <waddr_9> of sequential type is unconnected in block <iface>.
WARNING:Xst:2677 - Node <waddr_10> of sequential type is unconnected in block <iface>.
WARNING:Xst:2677 - Node <waddr_11> of sequential type is unconnected in block <iface>.
WARNING:Xst:2677 - Node <raddr_9> of sequential type is unconnected in block <iface>.
WARNING:Xst:2677 - Node <raddr_10> of sequential type is unconnected in block <iface>.
WARNING:Xst:2677 - Node <raddr_11> of sequential type is unconnected in block <iface>.
WARNING:Xst:2677 - Node <vec_out_0> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_1> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_2> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_3> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_4> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_5> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_6> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_7> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_8> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_9> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_10> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_11> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_12> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_13> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_14> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_15> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_16> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_17> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_18> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_19> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_20> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_21> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_22> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_23> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_24> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_25> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_26> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_27> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_28> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_29> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_30> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_31> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_32> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_33> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_34> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_35> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_36> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_37> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_38> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_39> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_40> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_41> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_42> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_43> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_44> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_45> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_46> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_47> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_48> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_49> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_50> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_51> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_52> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_53> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_54> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_55> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_56> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_57> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_58> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_59> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_60> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_61> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_62> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_63> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_64> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_65> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_66> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_67> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_68> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_69> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_70> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_71> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_72> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_73> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_74> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_75> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_76> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_77> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_78> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_79> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_80> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_82> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_83> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_84> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_85> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_86> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_87> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_88> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_89> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_90> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_91> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_92> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_93> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_94> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_95> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_96> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_97> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_98> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_99> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_100> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_101> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_102> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_103> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_104> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_105> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_106> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_107> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_108> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_109> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_110> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_111> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_112> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_113> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_114> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_115> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_116> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_117> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_118> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_119> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_120> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_121> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_122> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_123> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_124> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_125> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_126> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <vec_out_127> of sequential type is unconnected in block <cfg>.
WARNING:Xst:2677 - Node <d_edge> of sequential type is unconnected in block <stretch_tx>.
WARNING:Xst:2677 - Node <d_sync> of sequential type is unconnected in block <stretch_tx>.
WARNING:Xst:2677 - Node <d_sync_d> of sequential type is unconnected in block <stretch_tx>.
WARNING:Xst:2677 - Node <d25_d> of sequential type is unconnected in block <stretch_tx>.
WARNING:Xst:2677 - Node <q_i> of sequential type is unconnected in block <stretch_tx>.
WARNING:Xst:2677 - Node <d25> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <d28> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <d17> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_0> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_1> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_2> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_3> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_4> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_5> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_6> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_7> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_8> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_9> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_10> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_11> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_12> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_13> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_14> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_15> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_16> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_17> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_18> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_19> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_20> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_21> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_22> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_23> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_24> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_25> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_26> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_27> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <d_edge> of sequential type is unconnected in block <stretch_rx>.
WARNING:Xst:2677 - Node <d_sync> of sequential type is unconnected in block <stretch_rx>.
WARNING:Xst:2677 - Node <d_sync_d> of sequential type is unconnected in block <stretch_rx>.
WARNING:Xst:2677 - Node <d25_d> of sequential type is unconnected in block <stretch_rx>.
WARNING:Xst:2677 - Node <q_i> of sequential type is unconnected in block <stretch_rx>.
WARNING:Xst:2677 - Node <d25> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <d28> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <d17> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_0> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_1> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_2> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_3> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_4> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_5> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_6> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_7> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_8> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_9> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_10> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_11> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_12> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_13> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_14> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_15> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_16> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_17> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_18> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_19> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_20> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_21> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_22> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_23> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_24> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_25> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_26> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:2677 - Node <cnt_27> of sequential type is unconnected in block <clkdiv>.
WARNING:Xst:1710 - FF/Latch <build_packet.buf_to_load_int_6> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <build_packet.buf_to_load_int_9> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <build_packet.buf_to_load_int_11> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <build_packet.buf_to_load_int_12> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <build_packet.buf_to_load_int_13> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <build_packet.buf_to_load_int_14> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <build_packet.buf_to_load_int_15> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <write_data.shift_buf_6> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <write_data.shift_buf_14> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <buf_to_load_6> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <buf_to_load_9> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <buf_to_load_11> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <buf_to_load_12> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <buf_to_load_13> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <buf_to_load_14> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <buf_to_load_15> (without init value) has a constant value of 0 in block <ARP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:2677 - Node <clean_0> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_1> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_2> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_3> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_4> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_5> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_6> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_7> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_8> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_9> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_10> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_11> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_12> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_13> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_14> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_15> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_block.clean_i_0> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_block.clean_i_1> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_block.clean_i_2> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_block.clean_i_3> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_block.clean_i_4> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_block.clean_i_5> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_block.clean_i_6> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_block.clean_i_7> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_block.clean_i_8> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_block.clean_i_9> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_block.clean_i_10> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_block.clean_i_11> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_block.clean_i_12> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_block.clean_i_13> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_block.clean_i_14> of sequential type is unconnected in block <rx_ram_selector>.
WARNING:Xst:2677 - Node <clean_block.clean_i_15> of sequential type is unconnected in block <rx_ram_selector>.

Mapping all equations...
Building and optimizing final netlist ...
Found area constraint ratio of 100 (+ 5) on block AMC13_T2, actual ratio is 12.
WARNING:Xst:1426 - The value init of the FF/Latch TTC_data_1_LD hinder the constant cleaning in the block AMC13_T2.
   You should achieve better results by setting this init to 1.
WARNING:Xst:1426 - The value init of the FF/Latch load_DNA_0_LD hinder the constant cleaning in the block AMC13_T2.
   You should achieve better results by setting this init to 1.
WARNING:Xst:1426 - The value init of the FF/Latch CRC_0_LD hinder the constant cleaning in the block AMC13_T2.
   You should achieve better results by setting this init to 1.
WARNING:Xst:1426 - The value init of the FF/Latch ICAP_Di_0_LD hinder the constant cleaning in the block i_reboot.
   You should achieve better results by setting this init to 1.
FlipFlop i_SPI_if/BitCntr_3 has been replicated 2 time(s)
FlipFlop i_SPI_if/BitCntr_4 has been replicated 2 time(s)
FlipFlop i_SPI_if/STATUS_5 has been replicated 1 time(s)
FlipFlop i_SPI_if/addr_0 has been replicated 1 time(s)
FlipFlop i_SPI_if/addr_1 has been replicated 2 time(s)

Final Macro Processing ...

=========================================================================
Final Register Report

Macro Statistics
# Registers                                            : 5948
 Flip-Flops                                            : 5948

=========================================================================

=========================================================================
*                           Partition Report                            *
=========================================================================

Partition Implementation Status
-------------------------------

  No Partitions were found in this design.

-------------------------------

=========================================================================
*                            Design Summary                             *
=========================================================================

Top Level Output File Name         : AMC13_T2.ngc

Primitive and Black Box Usage:
------------------------------
# BELS                             : 8007
#      GND                         : 43
#      INV                         : 127
#      LUT1                        : 571
#      LUT2                        : 1101
#      LUT3                        : 1028
#      LUT4                        : 598
#      LUT5                        : 788
#      LUT6                        : 1909
#      MUXCY                       : 878
#      MUXF7                       : 107
#      MUXF8                       : 30
#      ROM32X1                     : 1
#      VCC                         : 48
#      XORCY                       : 778
# FlipFlops/Latches                : 6213
#      FD                          : 2699
#      FD_1                        : 1
#      FDC                         : 63
#      FDC_1                       : 1
#      FDCE                        : 362
#      FDE                         : 1663
#      FDP                         : 22
#      FDPE                        : 29
#      FDR                         : 462
#      FDR_1                       : 8
#      FDRE                        : 818
#      FDS                         : 16
#      FDSE                        : 38
#      IDDR2                       : 1
#      LD                          : 4
#      ODDR2                       : 26
# RAMS                             : 59
#      RAM32X1D                    : 17
#      RAMB16BWER                  : 41
#      RAMB8BWER                   : 1
# Shift Registers                  : 162
#      SRL16                       : 4
#      SRL16E                      : 18
#      SRLC16E                     : 13
#      SRLC32E                     : 127
# Clock Buffers                    : 14
#      BUFG                        : 12
#      BUFGMUX                     : 2
# IO Buffers                       : 89
#      BUFIO2                      : 1
#      IBUF                        : 22
#      IBUFDS                      : 14
#      IBUFG                       : 2
#      IBUFGDS                     : 4
#      IOBUF                       : 4
#      OBUF                        : 26
#      OBUFDS                      : 1
#      OBUFT                       : 3
#      OBUFTDS                     : 12
# DCMs                             : 5
#      DCM_SP                      : 5
# GigabitIOs                       : 1
#      GTPA1_DUAL                  : 1
# Others                           : 3
#      DNA_PORT                    : 1
#      ICAP_SPARTAN6               : 1
#      PLL_ADV                     : 1

Device utilization summary:
---------------------------

Selected Device : 6slx45tfgg484-2 


Slice Logic Utilization: 
 Number of Slice Registers:            6212  out of  54576    11%  
 Number of Slice LUTs:                 6319  out of  27288    23%  
    Number used as Logic:              6122  out of  27288    22%  
    Number used as Memory:              197  out of   6408     3%  
       Number used as RAM:               34
       Number used as ROM:                1
       Number used as SRL:              162

Slice Logic Distribution: 
 Number of LUT Flip Flop pairs used:   8704
   Number with an unused Flip Flop:    2492  out of   8704    28%  
   Number with an unused LUT:          2385  out of   8704    27%  
   Number of fully used LUT-FF pairs:  3827  out of   8704    43%  
   Number of unique control sets:       262

IO Utilization: 
 Number of IOs:                         123
 Number of bonded IOBs:                 119  out of    296    40%  
    IOB Flip Flops/Latches:               1

Specific Feature Utilization:
 Number of Block RAM/FIFO:               42  out of    116    36%  
    Number using Block RAM only:         42
 Number of BUFG/BUFGCTRLs:               14  out of     16    87%  
 Number of PLL_ADVs:                      1  out of      4    25%  

---------------------------
Partition Resource Summary:
---------------------------

  No Partitions were found in this design.

---------------------------


=========================================================================
Timing Report

NOTE: THESE TIMING NUMBERS ARE ONLY A SYNTHESIS ESTIMATE.
      FOR ACCURATE TIMING INFORMATION PLEASE REFER TO THE TRACE REPORT
      GENERATED AFTER PLACE-and-ROUTE.

Clock Information:
------------------
---------------------------------------------------------------------------+-------------------------------+-------+
Clock Signal                                                               | Clock buffer(FF name)         | Load  |
---------------------------------------------------------------------------+-------------------------------+-------+
i_GTP_if/i_S6Link_GbE/tile0_S6Link_GbE_i/GTPCLKOUT1_OUT<0>                 | DCM_SP:CLKDV                  | 702   |
i_GTP_if/i_S6Link_GbE/tile0_S6Link_GbE_i/GTPCLKOUT1_OUT<0>                 | DCM_SP:CLK0                   | 4407  |
i_DCM_TTCclk/CLKOUT0                                                       | BUFG                          | 739   |
i_GTP_if/i_S6Link_GbE/tile0_S6Link_GbE_i/GTPCLKOUT1_OUT<0>                 | DCM_SP:CLKFX                  | 42    |
DNA_div_4                                                                  | BUFG                          | 71    |
i_DCM_TTCclk/CLKOUT1                                                       | BUFGMUX                       | 22    |
TTC_REFCLK                                                                 | IBUFG                         | 1     |
TTC_CLK_p<0>                                                               | DCM_SP:CLK0                   | 12    |
TTC_CLK_p<1>                                                               | DCM_SP:CLK0                   | 12    |
TTC_CLK_p<2>                                                               | DCM_SP:CLK0                   | 12    |
TTC_CLK_p<3>                                                               | DCM_SP:CLK0                   | 12    |
i_DCM_TTCclk/CLKOUT2                                                       | BUFGMUX                       | 322   |
FSIO_SCK                                                                   | IBUFG+BUFG                    | 142   |
GbEGTPreset(GbEGTPreset1:O)                                                | NONE(*)(i_reboot/ICAP_Di_0_LD)| 1     |
i_DCM_TTCclk/LOCKED                                                        | NONE(TTC_data_1_LD)           | 1     |
sysclk_dcm_locked_reprogV6_OR_106_o(sysclk_dcm_locked_reprogV6_OR_106_o1:O)| NONE(*)(CRC_0_LD)             | 1     |
---------------------------------------------------------------------------+-------------------------------+-------+
(*) These 2 clock signal(s) are generated by combinatorial logic,
and XST is not able to identify which are the primary clock signals.
Please use the CLOCK_SIGNAL constraint to specify the clock signal(s) generated by combinatorial logic.
INFO:Xst:2169 - HDL ADVISOR - Some clock signals were not automatically buffered by XST with BUFG/BUFR resources. Please use the buffer_type constraint in order to insert these buffers to the clock signals to help prevent skew problems.

Asynchronous Control Signals Information:
----------------------------------------
No asynchronous control signals found in this design

Timing Summary:
---------------
Speed Grade: -2

   Minimum period: 10.126ns (Maximum Frequency: 98.756MHz)
   Minimum input arrival time before clock: 8.989ns
   Maximum output required time after clock: 6.501ns
   Maximum combinational path delay: 6.593ns

Timing Details:
---------------
All values displayed in nanoseconds (ns)

=========================================================================
Timing constraint: Default period analysis for Clock 'i_GTP_if/i_S6Link_GbE/tile0_S6Link_GbE_i/GTPCLKOUT1_OUT<0>'
  Clock period: 9.936ns (frequency: 100.642MHz)
  Total number of paths / destination ports: 91441 / 9872
-------------------------------------------------------------------------
Delay:               9.936ns (Levels of Logic = 16)
  Source:            i_GTP_if/i_mac/emacclientrxdvld (FF)
  Destination:       i_ipbus/udp_if/ping/next_addr.next_low (FF)
  Source Clock:      i_GTP_if/i_S6Link_GbE/tile0_S6Link_GbE_i/GTPCLKOUT1_OUT<0> rising
  Destination Clock: i_GTP_if/i_S6Link_GbE/tile0_S6Link_GbE_i/GTPCLKOUT1_OUT<0> rising

  Data Path: i_GTP_if/i_mac/emacclientrxdvld to i_ipbus/udp_if/ping/next_addr.next_low
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     FD:C->Q             277   0.525   2.434  emacclientrxdvld (emacclientrxdvld)
     end scope: 'i_GTP_if/i_mac:emacclientrxdvld'
     end scope: 'i_GTP_if:GbErxdvld'
     begin scope: 'i_ipbus:mac_rx_valid'
     begin scope: 'i_ipbus/udp_if:mac_rx_valid'
     begin scope: 'i_ipbus/udp_if/rx_reset_block:mac_rx_valid'
     LUT2:I1->O         1151   0.254   2.640  rx_reset1 (rx_reset)
     end scope: 'i_ipbus/udp_if/rx_reset_block:rx_reset'
     begin scope: 'i_ipbus/udp_if/ping:rx_reset'
     LUT3:I2->O            8   0.254   0.944  mux131411_1 (mux131411)
     LUT6:I5->O            1   0.254   0.000  Madd_next_addr.addr_int[12]_GND_272_o_add_55_OUT_lut<0> (Madd_next_addr.addr_int[12]_GND_272_o_add_55_OUT_lut<0>)
     MUXCY:S->O            1   0.215   0.000  Madd_next_addr.addr_int[12]_GND_272_o_add_55_OUT_cy<0> (Madd_next_addr.addr_int[12]_GND_272_o_add_55_OUT_cy<0>)
     MUXCY:CI->O           1   0.023   0.000  Madd_next_addr.addr_int[12]_GND_272_o_add_55_OUT_cy<1> (Madd_next_addr.addr_int[12]_GND_272_o_add_55_OUT_cy<1>)
     MUXCY:CI->O           1   0.023   0.000  Madd_next_addr.addr_int[12]_GND_272_o_add_55_OUT_cy<2> (Madd_next_addr.addr_int[12]_GND_272_o_add_55_OUT_cy<2>)
     MUXCY:CI->O           1   0.023   0.000  Madd_next_addr.addr_int[12]_GND_272_o_add_55_OUT_cy<3> (Madd_next_addr.addr_int[12]_GND_272_o_add_55_OUT_cy<3>)
     MUXCY:CI->O           1   0.023   0.000  Madd_next_addr.addr_int[12]_GND_272_o_add_55_OUT_cy<4> (Madd_next_addr.addr_int[12]_GND_272_o_add_55_OUT_cy<4>)
     MUXCY:CI->O           1   0.023   0.000  Madd_next_addr.addr_int[12]_GND_272_o_add_55_OUT_cy<5> (Madd_next_addr.addr_int[12]_GND_272_o_add_55_OUT_cy<5>)
     XORCY:CI->O           2   0.206   0.834  Madd_next_addr.addr_int[12]_GND_272_o_add_55_OUT_xor<6> (next_addr.addr_int[12]_GND_272_o_add_55_OUT<6>)
     LUT2:I0->O            1   0.250   0.682  next_addr.addr_int[12]_GND_272_o_equal_57_o<12>_SW0 (N01)
     LUT6:I5->O            1   0.254   0.000  next_addr.addr_int[12]_GND_272_o_equal_57_o<12> (next_addr.addr_int[12]_GND_272_o_equal_57_o)
     FD:D                      0.074          next_addr.next_low
    ----------------------------------------
    Total                      9.936ns (2.402ns logic, 7.534ns route)
                                       (24.2% logic, 75.8% route)

=========================================================================
Timing constraint: Default period analysis for Clock 'i_DCM_TTCclk/CLKOUT0'
  Clock period: 7.970ns (frequency: 125.471MHz)
  Total number of paths / destination ports: 6104 / 1469
-------------------------------------------------------------------------
Delay:               3.985ns (Levels of Logic = 2)
  Source:            i_twinmux/ramb_st.ramb18_dp_st.ram18_st (RAM)
  Destination:       T3_SCK_o (FF)
  Source Clock:      i_DCM_TTCclk/CLKOUT0 falling
  Destination Clock: i_DCM_TTCclk/CLKOUT0 rising

  Data Path: i_twinmux/ramb_st.ramb18_dp_st.ram18_st to T3_SCK_o
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     RAMB16BWER:CLKA->DOA0    6   2.100   0.875  ramb_st.ramb18_dp_st.ram18_st (DOA<0>)
     end scope: 'i_twinmux:DOA<0>'
     INV:I->O              1   0.255   0.681  twinmux[0]_INV_652_o1_INV_0 (twinmux[0]_INV_652_o)
     FD:D                      0.074          T3_SCK_o
    ----------------------------------------
    Total                      3.985ns (2.429ns logic, 1.556ns route)
                                       (61.0% logic, 39.0% route)

=========================================================================
Timing constraint: Default period analysis for Clock 'DNA_div_4'
  Clock period: 8.049ns (frequency: 124.245MHz)
  Total number of paths / destination ports: 194 / 136
-------------------------------------------------------------------------
Delay:               4.024ns (Levels of Logic = 1)
  Source:            shift_DNA (FF)
  Destination:       DNA_0 (FF)
  Source Clock:      DNA_div_4 falling
  Destination Clock: DNA_div_4 rising

  Data Path: shift_DNA to DNA_0
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     FDC_1:C->Q           12   0.525   1.069  shift_DNA (shift_DNA)
     LUT2:I1->O           57   0.254   1.874  _n1607_inv1 (_n1607_inv)
     FDE:CE                    0.302          DNA_0
    ----------------------------------------
    Total                      4.024ns (1.081ns logic, 2.943ns route)
                                       (26.9% logic, 73.1% route)

=========================================================================
Timing constraint: Default period analysis for Clock 'i_DCM_TTCclk/CLKOUT1'
  Clock period: 4.482ns (frequency: 223.115MHz)
  Total number of paths / destination ports: 131 / 45
-------------------------------------------------------------------------
Delay:               4.482ns (Levels of Logic = 2)
  Source:            TTCclkPhase_3 (FF)
  Destination:       buffer_we_0 (FF)
  Source Clock:      i_DCM_TTCclk/CLKOUT1 rising
  Destination Clock: i_DCM_TTCclk/CLKOUT1 rising

  Data Path: TTCclkPhase_3 to buffer_we_0
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     FD:C->Q               5   0.525   1.069  TTCclkPhase_3 (TTCclkPhase_3)
     LUT3:I0->O            1   0.235   1.137  TTCclkPhase[3]_twinmux[0]_AND_483_o<3>1 (TTCclkPhase[3]_twinmux[0]_AND_483_o)
     LUT6:I0->O            4   0.254   0.803  _n1438 (_n1438)
     FDR:R                     0.459          buffer_we_0
    ----------------------------------------
    Total                      4.482ns (1.473ns logic, 3.009ns route)
                                       (32.9% logic, 67.1% route)

=========================================================================
Timing constraint: Default period analysis for Clock 'i_DCM_TTCclk/CLKOUT2'
  Clock period: 2.030ns (frequency: 492.611MHz)
  Total number of paths / destination ports: 266 / 168
-------------------------------------------------------------------------
Delay:               2.030ns (Levels of Logic = 2)
  Source:            g_trig_Twinmux[11].i_trig_data/d_7 (FF)
  Destination:       g_trig_Twinmux[11].i_trig_data/o_0 (FF)
  Source Clock:      i_DCM_TTCclk/CLKOUT2 rising
  Destination Clock: i_DCM_TTCclk/CLKOUT2 rising

  Data Path: g_trig_Twinmux[11].i_trig_data/d_7 to g_trig_Twinmux[11].i_trig_data/o_0
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     FD:C->Q               2   0.525   1.002  d_7 (d<7>)
     LUT6:I2->O            1   0.254   0.000  Mmux_dl[7]_d[8]_Mux_0_o_3 (Mmux_dl[7]_d[8]_Mux_0_o_3)
     MUXF7:I1->O           1   0.175   0.000  Mmux_dl[7]_d[8]_Mux_0_o_2_f7 (dl[7]_d[8]_Mux_0_o)
     FD:D                      0.074          o_0
    ----------------------------------------
    Total                      2.030ns (1.028ns logic, 1.002ns route)
                                       (50.6% logic, 49.4% route)

=========================================================================
Timing constraint: Default period analysis for Clock 'FSIO_SCK'
  Clock period: 10.126ns (frequency: 98.756MHz)
  Total number of paths / destination ports: 3735 / 264
-------------------------------------------------------------------------
Delay:               5.063ns (Levels of Logic = 4)
  Source:            i_SPI_if/BitCntr_2 (FF)
  Destination:       i_SPI_if/sr_out_4 (FF)
  Source Clock:      FSIO_SCK rising
  Destination Clock: FSIO_SCK falling

  Data Path: i_SPI_if/BitCntr_2 to i_SPI_if/sr_out_4
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     FDC:C->Q             11   0.525   1.267  BitCntr_2 (BitCntr_2)
     LUT3:I0->O           13   0.235   1.098  BitCntr[2]_GND_15_o_equal_50_o<2>1 (BitCntr[2]_GND_15_o_equal_50_o)
     LUT5:I4->O            2   0.254   1.181  Mmux_sr_out[6]_GND_15_o_mux_59_OUT52_SW0 (N17)
     LUT6:I0->O            1   0.254   0.000  sr_out_4_glue_set_G (N44)
     MUXF7:I1->O           1   0.175   0.000  sr_out_4_glue_set (sr_out_4_glue_set)
     FDR_1:D                   0.074          sr_out_4
    ----------------------------------------
    Total                      5.063ns (1.517ns logic, 3.546ns route)
                                       (30.0% logic, 70.0% route)

=========================================================================
Timing constraint: Default OFFSET IN BEFORE for Clock 'i_GTP_if/i_S6Link_GbE/tile0_S6Link_GbE_i/GTPCLKOUT1_OUT<0>'
  Total number of paths / destination ports: 248 / 152
-------------------------------------------------------------------------
Offset:              8.989ns (Levels of Logic = 12)
  Source:            SN_IN<9> (PAD)
  Destination:       i_ipbus/udp_if/ipbus_tx_ram/Mram_ram13 (RAM)
  Destination Clock: i_GTP_if/i_S6Link_GbE/tile0_S6Link_GbE_i/GTPCLKOUT1_OUT<0> rising 0.2X

  Data Path: SN_IN<9> to i_ipbus/udp_if/ipbus_tx_ram/Mram_ram13
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     IBUF:I->O            14   1.328   1.235  SN_IN_9_IBUF (SN_IN_9_IBUF)
     LUT2:I0->O            5   0.250   0.841  Mmux_SN<8>11 (SN<8>)
     LUT6:I5->O            1   0.254   0.682  Mmux_ipb_master_in_ipb_rdata363 (Mmux_ipb_master_in_ipb_rdata362)
     LUT6:I5->O            1   0.254   0.790  Mmux_ipb_master_in_ipb_rdata364 (Mmux_ipb_master_in_ipb_rdata363)
     LUT6:I4->O            2   0.250   0.834  Mmux_ipb_master_in_ipb_rdata366 (ipb_master_in_ipb_rdata<24>)
     begin scope: 'i_ipbus:ipb_in_ipb_rdata<24>'
     begin scope: 'i_ipbus/trans:ipb_in_ipb_rdata<24>'
     begin scope: 'i_ipbus/trans/sm:ipb_in_ipb_rdata<24>'
     LUT5:I3->O            1   0.250   0.790  mux10161 (tx_data<24>)
     end scope: 'i_ipbus/trans/sm:tx_data<24>'
     begin scope: 'i_ipbus/trans/iface:tx_data<24>'
     LUT6:I4->O            1   0.250   0.681  Mmux_trans_out_wdata171 (trans_out_wdata<24>)
     end scope: 'i_ipbus/trans/iface:trans_out_wdata<24>'
     end scope: 'i_ipbus/trans:trans_out_wdata<24>'
     begin scope: 'i_ipbus/udp_if:wdata<24>'
     begin scope: 'i_ipbus/udp_if/ipbus_tx_ram:tx_dia<24>'
     RAMB16BWER:DIA0           0.300          Mram_ram13
    ----------------------------------------
    Total                      8.989ns (3.136ns logic, 5.853ns route)
                                       (34.9% logic, 65.1% route)

=========================================================================
Timing constraint: Default OFFSET IN BEFORE for Clock 'DNA_div_4'
  Total number of paths / destination ports: 1 / 1
-------------------------------------------------------------------------
Offset:              0.755ns (Levels of Logic = 0)
  Source:            i_DNA_PORT:DOUT (PAD)
  Destination:       DNA_0 (FF)
  Destination Clock: DNA_div_4 rising

  Data Path: i_DNA_PORT:DOUT to DNA_0
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
    DNA_PORT:DOUT          1   0.000   0.681  i_DNA_PORT (DNA_out)
     FDE:D                     0.074          DNA_0
    ----------------------------------------
    Total                      0.755ns (0.074ns logic, 0.681ns route)
                                       (9.8% logic, 90.2% route)

=========================================================================
Timing constraint: Default OFFSET IN BEFORE for Clock 'i_DCM_TTCclk/CLKOUT0'
  Total number of paths / destination ports: 2 / 1
-------------------------------------------------------------------------
Offset:              2.009ns (Levels of Logic = 1)
  Source:            TTCdata_p (PAD)
  Destination:       i_TTC_data (FF)
  Destination Clock: i_DCM_TTCclk/CLKOUT0 rising

  Data Path: TTCdata_p to i_TTC_data
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     IBUFDS:I->O           1   1.328   0.681  i_TTCdata (TTCdata_in)
     IDDR2:D                   0.000          i_TTC_data
    ----------------------------------------
    Total                      2.009ns (1.328ns logic, 0.681ns route)
                                       (66.1% logic, 33.9% route)

=========================================================================
Timing constraint: Default OFFSET IN BEFORE for Clock 'i_DCM_TTCclk/CLKOUT2'
  Total number of paths / destination ports: 26 / 14
-------------------------------------------------------------------------
Offset:              3.063ns (Levels of Logic = 3)
  Source:            T3_TCDS_aux1 (PAD)
  Destination:       i_TRIG0/d_0 (FF)
  Destination Clock: i_DCM_TTCclk/CLKOUT2 rising

  Data Path: T3_TCDS_aux1 to i_TRIG0/d_0
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     IBUF:I->O             2   1.328   0.725  T3_TCDS_aux1_IBUF (T3_TCDS_aux1_IBUF)
     begin scope: 'i_TRIG0:din'
     INV:I->O              1   0.255   0.681  Mxor_din_polarity_din_XOR_576_o_xo<0>1_INV_0 (din_polarity_din_XOR_576_o)
     FD:D                      0.074          d_0
    ----------------------------------------
    Total                      3.063ns (1.657ns logic, 1.406ns route)
                                       (54.1% logic, 45.9% route)

=========================================================================
Timing constraint: Default OFFSET IN BEFORE for Clock 'FSIO_SCK'
  Total number of paths / destination ports: 71 / 46
-------------------------------------------------------------------------
Offset:              6.501ns (Levels of Logic = 8)
  Source:            SN_IN<9> (PAD)
  Destination:       i_SPI_if/sr_out_1 (FF)
  Destination Clock: FSIO_SCK falling

  Data Path: SN_IN<9> to i_SPI_if/sr_out_1
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     IBUF:I->O            14   1.328   1.235  SN_IN_9_IBUF (SN_IN_9_IBUF)
     LUT2:I0->O            5   0.250   1.117  Mmux_SN<8>11 (SN<8>)
     begin scope: 'i_SPI_if:SN<8>'
     LUT4:I0->O            2   0.254   0.726  Mmux_IPADDR_i321 (IPADDR<9>)
     LUT6:I5->O            1   0.254   0.000  mux1_4 (mux1_4)
     MUXF7:I1->O           1   0.175   0.000  mux1_3_f7 (mux1_3_f7)
     MUXF8:I1->O           1   0.152   0.682  mux1_2_f8 (addr[3]_GND_15_o_wide_mux_55_OUT<1>1)
     LUT6:I5->O            1   0.254   0.000  sr_out_1_glue_set (sr_out_1_glue_set)
     FDR_1:D                   0.074          sr_out_1
    ----------------------------------------
    Total                      6.501ns (2.741ns logic, 3.760ns route)
                                       (42.2% logic, 57.8% route)

=========================================================================
Timing constraint: Default OFFSET OUT AFTER for Clock 'i_GTP_if/i_S6Link_GbE/tile0_S6Link_GbE_i/GTPCLKOUT1_OUT<0>'
  Total number of paths / destination ports: 69 / 40
-------------------------------------------------------------------------
Offset:              6.501ns (Levels of Logic = 2)
  Source:            i_V6PROG_B (FF)
  Destination:       V6_PROG_B (PAD)
  Source Clock:      i_GTP_if/i_S6Link_GbE/tile0_S6Link_GbE_i/GTPCLKOUT1_OUT<0> rising 0.2X

  Data Path: i_V6PROG_B to V6_PROG_B
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     SRL16E:CLK->Q         4   1.746   0.912  i_V6PROG_B (prog_V6_n)
     LUT2:I0->O            1   0.250   0.681  V6_PROG_B1 (V6_PROG_B_OBUF)
     OBUF:I->O                 2.912          V6_PROG_B_OBUF (V6_PROG_B)
    ----------------------------------------
    Total                      6.501ns (4.908ns logic, 1.593ns route)
                                       (75.5% logic, 24.5% route)

=========================================================================
Timing constraint: Default OFFSET OUT AFTER for Clock 'FSIO_SCK'
  Total number of paths / destination ports: 1 / 1
-------------------------------------------------------------------------
Offset:              5.158ns (Levels of Logic = 3)
  Source:            i_SPI_if/sr_out_7 (FF)
  Destination:       FSIO_MISO (PAD)
  Source Clock:      FSIO_SCK falling

  Data Path: i_SPI_if/sr_out_7 to FSIO_MISO
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     FDR_1:C->Q            1   0.525   0.790  sr_out_7 (sr_out_7)
     end scope: 'i_SPI_if:MISO'
     LUT3:I1->O            1   0.250   0.681  Mmux_Z_11_o_S6_MISO_MUX_7_o11 (FSIO_MISO_OBUFT)
     OBUFT:I->O                2.912          FSIO_MISO_OBUFT (FSIO_MISO)
    ----------------------------------------
    Total                      5.158ns (3.687ns logic, 1.471ns route)
                                       (71.5% logic, 28.5% route)

=========================================================================
Timing constraint: Default OFFSET OUT AFTER for Clock 'i_DCM_TTCclk/CLKOUT0'
  Total number of paths / destination ports: 1 / 1
-------------------------------------------------------------------------
Offset:              4.118ns (Levels of Logic = 1)
  Source:            T3_SCK_o (FF)
  Destination:       T3_SCK (PAD)
  Source Clock:      i_DCM_TTCclk/CLKOUT0 rising

  Data Path: T3_SCK_o to T3_SCK
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     FD:C->Q               1   0.525   0.681  T3_SCK_o (T3_SCK_o)
     OBUFT:I->O                2.912          T3_SCK_OBUFT (T3_SCK)
    ----------------------------------------
    Total                      4.118ns (3.437ns logic, 0.681ns route)
                                       (83.5% logic, 16.5% route)

=========================================================================
Timing constraint: Default OFFSET OUT AFTER for Clock 'DNA_div_4'
  Total number of paths / destination ports: 3 / 2
-------------------------------------------------------------------------
Offset:              2.290ns (Levels of Logic = 1)
  Source:            load_DNA_1_C_1 (FF)
  Destination:       i_DNA_PORT:READ (PAD)
  Source Clock:      DNA_div_4 rising

  Data Path: load_DNA_1_C_1 to i_DNA_PORT:READ
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     FD:C->Q               1   0.525   0.790  load_DNA_1_C_1 (load_DNA_1_C_1)
     LUT3:I1->O            2   0.250   0.725  load_DNA_11 (load_DNA_1)
    DNA_PORT:READ              0.000          i_DNA_PORT
    ----------------------------------------
    Total                      2.290ns (0.775ns logic, 1.515ns route)
                                       (33.8% logic, 66.2% route)

=========================================================================
Timing constraint: Default OFFSET OUT AFTER for Clock 'GbEGTPreset'
  Total number of paths / destination ports: 16 / 16
-------------------------------------------------------------------------
Offset:              2.907ns (Levels of Logic = 1)
  Source:            i_reboot/ICAP_Di_0_LD (LATCH)
  Destination:       i_reboot/ICAP_SPARTAN6_inst:I15 (PAD)
  Source Clock:      GbEGTPreset falling

  Data Path: i_reboot/ICAP_Di_0_LD to i_reboot/ICAP_SPARTAN6_inst:I15
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     LD:G->Q              16   0.581   1.410  ICAP_Di_0_LD (ICAP_Di_0_LD)
     LUT3:I0->O            1   0.235   0.681  ICAP_Di_01 (ICAP_Di_0)
    ICAP_SPARTAN6:I0           0.000          ICAP_SPARTAN6_inst
    ----------------------------------------
    Total                      2.907ns (0.816ns logic, 2.091ns route)
                                       (28.1% logic, 71.9% route)

=========================================================================
Timing constraint: Default path analysis
  Total number of paths / destination ports: 38 / 34
-------------------------------------------------------------------------
Delay:               6.593ns (Levels of Logic = 3)
  Source:            FSIO_CS_B<0> (PAD)
  Destination:       FSIO_MISO (PAD)

  Data Path: FSIO_CS_B<0> to FSIO_MISO
                                Gate     Net
    Cell:in->out      fanout   Delay   Delay  Logical Name (Net Name)
    ----------------------------------------  ------------
     IOBUF:IO->O          17   1.328   1.437  g_FSIO_CS_B[0].i_FSIO_CS_B (FSIO_CS_I<0>)
     LUT3:I0->O            1   0.235   0.681  Mmux_Z_11_o_S6_MISO_MUX_7_o11 (FSIO_MISO_OBUFT)
     OBUFT:I->O                2.912          FSIO_MISO_OBUFT (FSIO_MISO)
    ----------------------------------------
    Total                      6.593ns (4.475ns logic, 2.118ns route)
                                       (67.9% logic, 32.1% route)

=========================================================================

Cross Clock Domains Report:
--------------------------

Clock to Setup on destination clock DNA_div_4
---------------+---------+---------+---------+---------+
               | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock   |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
DNA_div_4      |    1.535|    4.024|    3.089|         |
---------------+---------+---------+---------+---------+

Clock to Setup on destination clock FSIO_SCK
---------------+---------+---------+---------+---------+
               | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock   |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
FSIO_SCK       |    7.160|         |    5.063|         |
---------------+---------+---------+---------+---------+

Clock to Setup on destination clock TTC_CLK_p<0>
----------------------------------------------------------+---------+---------+---------+---------+
                                                          | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock                                              |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
----------------------------------------------------------+---------+---------+---------+---------+
i_DCM_TTCclk/CLKOUT0                                      |         |    1.593|    1.593|         |
i_GTP_if/i_S6Link_GbE/tile0_S6Link_GbE_i/GTPCLKOUT1_OUT<0>|    2.412|         |    2.412|         |
----------------------------------------------------------+---------+---------+---------+---------+

Clock to Setup on destination clock TTC_CLK_p<1>
----------------------------------------------------------+---------+---------+---------+---------+
                                                          | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock                                              |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
----------------------------------------------------------+---------+---------+---------+---------+
i_DCM_TTCclk/CLKOUT0                                      |         |    1.593|    1.593|         |
i_GTP_if/i_S6Link_GbE/tile0_S6Link_GbE_i/GTPCLKOUT1_OUT<0>|    2.412|         |    2.412|         |
----------------------------------------------------------+---------+---------+---------+---------+

Clock to Setup on destination clock TTC_CLK_p<2>
----------------------------------------------------------+---------+---------+---------+---------+
                                                          | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock                                              |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
----------------------------------------------------------+---------+---------+---------+---------+
i_DCM_TTCclk/CLKOUT0                                      |         |    1.593|    1.593|         |
i_GTP_if/i_S6Link_GbE/tile0_S6Link_GbE_i/GTPCLKOUT1_OUT<0>|    2.412|         |    2.412|         |
----------------------------------------------------------+---------+---------+---------+---------+

Clock to Setup on destination clock TTC_CLK_p<3>
----------------------------------------------------------+---------+---------+---------+---------+
                                                          | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock                                              |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
----------------------------------------------------------+---------+---------+---------+---------+
i_DCM_TTCclk/CLKOUT0                                      |         |    1.593|    1.593|         |
i_GTP_if/i_S6Link_GbE/tile0_S6Link_GbE_i/GTPCLKOUT1_OUT<0>|    2.412|         |    2.412|         |
----------------------------------------------------------+---------+---------+---------+---------+

Clock to Setup on destination clock i_DCM_TTCclk/CLKOUT0
----------------------------------------------------------+---------+---------+---------+---------+
                                                          | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock                                              |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
----------------------------------------------------------+---------+---------+---------+---------+
i_DCM_TTCclk/CLKOUT0                                      |    6.105|    3.985|         |         |
i_DCM_TTCclk/CLKOUT2                                      |         |         |    1.606|         |
i_DCM_TTCclk/LOCKED                                       |    2.143|         |         |         |
i_GTP_if/i_S6Link_GbE/tile0_S6Link_GbE_i/GTPCLKOUT1_OUT<0>|    4.878|         |         |         |
----------------------------------------------------------+---------+---------+---------+---------+

Clock to Setup on destination clock i_DCM_TTCclk/CLKOUT1
----------------------------------------------------------+---------+---------+---------+---------+
                                                          | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock                                              |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
----------------------------------------------------------+---------+---------+---------+---------+
i_DCM_TTCclk/CLKOUT0                                      |    1.723|    5.883|         |         |
i_DCM_TTCclk/CLKOUT1                                      |    4.482|         |         |         |
i_DCM_TTCclk/CLKOUT2                                      |    1.506|         |         |         |
i_GTP_if/i_S6Link_GbE/tile0_S6Link_GbE_i/GTPCLKOUT1_OUT<0>|    1.324|         |         |         |
----------------------------------------------------------+---------+---------+---------+---------+

Clock to Setup on destination clock i_DCM_TTCclk/CLKOUT2
----------------------------------------------------------+---------+---------+---------+---------+
                                                          | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock                                              |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
----------------------------------------------------------+---------+---------+---------+---------+
i_DCM_TTCclk/CLKOUT2                                      |    2.030|         |         |         |
i_GTP_if/i_S6Link_GbE/tile0_S6Link_GbE_i/GTPCLKOUT1_OUT<0>|    2.249|         |         |         |
----------------------------------------------------------+---------+---------+---------+---------+

Clock to Setup on destination clock i_GTP_if/i_S6Link_GbE/tile0_S6Link_GbE_i/GTPCLKOUT1_OUT<0>
----------------------------------------------------------+---------+---------+---------+---------+
                                                          | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock                                              |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
----------------------------------------------------------+---------+---------+---------+---------+
DNA_div_4                                                 |    9.603|         |         |         |
FSIO_SCK                                                  |    9.124|         |         |         |
i_DCM_TTCclk/CLKOUT0                                      |    9.820|         |         |         |
i_GTP_if/i_S6Link_GbE/tile0_S6Link_GbE_i/GTPCLKOUT1_OUT<0>|   11.557|         |    3.151|         |
sysclk_dcm_locked_reprogV6_OR_106_o                       |         |   10.997|         |         |
----------------------------------------------------------+---------+---------+---------+---------+

=========================================================================


Total REAL time to Xst completion: 163.00 secs
Total CPU time to Xst completion: 145.78 secs
 
--> 


Total memory usage is 595340 kilobytes

Number of errors   :    0 (   0 filtered)
Number of warnings : 1025 (   0 filtered)
Number of infos    :   49 (   0 filtered)