Release 14.7 - Bitgen P.20131013 (lin64) Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. Loading device for application Rf_Device from file '6slx45t.nph' in environment /opt/Xilinx/14.7/ISE_DS/ISE/. "AMC13_T2" is an NCD, version 3.2, device xc6slx45t, package fgg484, speed -2 Opened constraints file AMC13_T2.pcf. Tue Sep 22 23:50:03 2020 /opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64/unwrapped/bitgen -intstyle ise -w -g DebugBitstream:No -g Binary:no -g CRC:Enable -g Reset_on_err:Yes -g ConfigRate:2 -g ProgPin:PullUp -g TckPin:PullUp -g TdiPin:PullUp -g TdoPin:PullUp -g TmsPin:PullUp -g UnusedPin:PullDown -g UserID:0xFFFFFFFF -g ExtMasterCclk_en:No -g SPI_buswidth:1 -g TIMER_CFG:0xFFFF -g multipin_wakeup:No -g StartUpClk:CClk -g DONE_cycle:4 -g GTS_cycle:5 -g GWE_cycle:6 -g LCK_cycle:NoWait -g Security:None -g DonePipe:Yes -g DriveDone:Yes -g en_sw_gsr:No -g drive_awake:No -g sw_clk:Startupclk -g sw_gwe_cycle:5 -g sw_gts_cycle:4 AMC13_T2.ncd Summary of Bitgen Options: +----------------------+----------------------+ | Option Name | Current Setting | +----------------------+----------------------+ | Compress | (Not Specified)* | +----------------------+----------------------+ | Readback | (Not Specified)* | +----------------------+----------------------+ | CRC | Enable** | +----------------------+----------------------+ | DebugBitstream | No** | +----------------------+----------------------+ | ConfigRate | 2** | +----------------------+----------------------+ | StartupClk | Cclk** | +----------------------+----------------------+ | DonePin | Pullup* | +----------------------+----------------------+ | ProgPin | Pullup** | +----------------------+----------------------+ | TckPin | Pullup** | +----------------------+----------------------+ | TdiPin | Pullup** | +----------------------+----------------------+ | TdoPin | Pullup** | +----------------------+----------------------+ | TmsPin | Pullup** | +----------------------+----------------------+ | UnusedPin | Pulldown** | +----------------------+----------------------+ | GWE_cycle | 6** | +----------------------+----------------------+ | GTS_cycle | 5** | +----------------------+----------------------+ | LCK_cycle | NoWait** | +----------------------+----------------------+ | DONE_cycle | 4** | +----------------------+----------------------+ | Persist | No* | +----------------------+----------------------+ | DriveDone | Yes | +----------------------+----------------------+ | DonePipe | Yes | +----------------------+----------------------+ | Security | None** | +----------------------+----------------------+ | UserID | 0xFFFFFFFF** | +----------------------+----------------------+ | ActiveReconfig | No* | +----------------------+----------------------+ | Partial | (Not Specified)* | +----------------------+----------------------+ | Encrypt | No* | +----------------------+----------------------+ | Key0 | pick* | +----------------------+----------------------+ | StartCBC | pick* | +----------------------+----------------------+ | KeyFile | (Not Specified)* | +----------------------+----------------------+ | drive_awake | No** | +----------------------+----------------------+ | Reset_on_err | Yes | +----------------------+----------------------+ | suspend_filter | Yes* | +----------------------+----------------------+ | en_sw_gsr | No** | +----------------------+----------------------+ | en_suspend | No* | +----------------------+----------------------+ | sw_clk | Startupclk** | +----------------------+----------------------+ | sw_gwe_cycle | 5** | +----------------------+----------------------+ | sw_gts_cycle | 4** | +----------------------+----------------------+ | multipin_wakeup | No** | +----------------------+----------------------+ | wakeup_mask | 0x00* | +----------------------+----------------------+ | ExtMasterCclk_en | No** | +----------------------+----------------------+ | ExtMasterCclk_divide | 1* | +----------------------+----------------------+ | CrcCoverage | No* | +----------------------+----------------------+ | glutmask | Yes* | +----------------------+----------------------+ | next_config_addr | 0x00000000* | +----------------------+----------------------+ | next_config_new_mode | No* | +----------------------+----------------------+ | next_config_boot_mode | 001* | +----------------------+----------------------+ | next_config_register_write | Enable* | +----------------------+----------------------+ | next_config_reboot | Enable* | +----------------------+----------------------+ | golden_config_addr | 0x00000000* | +----------------------+----------------------+ | failsafe_user | 0x0000* | +----------------------+----------------------+ | TIMER_CFG | 0xFFFF | +----------------------+----------------------+ | spi_buswidth | 1** | +----------------------+----------------------+ | TimeStamp | Default* | +----------------------+----------------------+ | IEEE1532 | No* | +----------------------+----------------------+ | Binary | No** | +----------------------+----------------------+ * Default setting. ** The specified setting matches the default setting. There were 0 CONFIG constraint(s) processed from AMC13_T2.pcf. Running DRC. WARNING:PhysDesignRules:372 - Gated clock. Clock net GbEGTPreset is sourced by a combinatorial pin. This is not good design practice. Use the CE pin to control the loading of data into the flip-flop. WARNING:PhysDesignRules:372 - Gated clock. Clock net TTC_lock_inv is sourced by a combinatorial pin. This is not good design practice. Use the CE pin to control the loading of data into the flip-flop. WARNING:PhysDesignRules:372 - Gated clock. Clock net sysclk_dcm_locked_reprogV6_OR_86_o is sourced by a combinatorial pin. This is not good design practice. Use the CE pin to control the loading of data into the flip-flop. WARNING:PhysDesignRules:781 - PULLUP on an active net. PULLUP of comp FLASH_S_PULLUP is set but the tri state is not configured. WARNING:PhysDesignRules:781 - PULLDOWN on an active net. PULLDOWN of comp FLASH_C_PULLDOWN is set but the tri state is not configured. WARNING:PhysDesignRules:1269 - Issue with pin connections and/or configuration on block::. The Q1 output pin of IFF is not used. INFO:PhysDesignRules:1861 - To achieve optimal frequency synthesis performance with the CLKFX and CLKFX180 outputs of the DCM comp i_sysclk_dcm, consult the device Data Sheet. DRC detected 0 errors and 6 warnings. Please see the previously displayed individual error or warning messages for more details. INFO:Security:54 - 'xc6slx45t' is a WebPack part. WARNING:Security:42 - Your software subscription period has lapsed. Your current version of Xilinx tools will continue to function, but you no longer qualify for Xilinx software updates or new releases. Creating bit map... Saving bit stream in "AMC13_T2.bit". Bitstream generation is complete.