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Address | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | Name | Description
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| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
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0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ACTION.DOUBLE_BUFFER | Start double-buffer copy of monitor registers
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| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
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0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ACTION.LOCAL_TRIG.CONTINUOUS | set continuous local L1A (setup with register 0x1c)
|
0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ACTION.LOCAL_TRIG.SEND_BURST | Send burst (possibly single) local L1A
|
0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ACTION.LOCAL_TRIG.SEND_ECR | sends event number reset thru TTC when in local L1A mode
|
0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ACTION.LOCAL_TRIG.SEND_OCR | sends orbit number reset thru TTC when in local L1A mode
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
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0x00001021 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ACTION.LTRIG.CATCH_BC0 | HCAL Trigger test mode catch BC0
|
0x00001021 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ACTION.LTRIG.SAMPLE_IN | HCAL Trigger test mode sample input
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x0000000c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ACTION.MONITOR_BUFFER.NEXT_PAGE | SDRAM increment page number by 1 in run mode
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ACTION.RESETS.COUNTER | counter reset
|
0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ACTION.RESETS.DAQ | DAQLSC reset
|
0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ACTION.RESETS.EVN | reset event number
|
0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ACTION.RESETS.GENERAL | general reset (ddr3 memory controller not included)
|
0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ACTION.RESETS.ORN | reset orbit number
|
0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ACTION.RESETS.SDRAM | reset ddr3 memory controller
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ACTION.TTC.SINGLE_COMMAND | Send single command if enabled by bit 30 in reg 0x24-0x27
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000006 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.AMC.BC0_COMPENSATION | AMC set BC0 compensation, default to 0x18
|
0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.AMC.ENABLE_MASK | '1' enables AMC1..12
|
0x00000018 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.AMC.FAKE_DATA_SIZE | Number of 64 bit words send for fake event payload
|
0x0000001a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.AMC.TTS_DISABLE_MASK | Disable corresponding AMCs TTS input signal
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.AMC01.ENABLE_MASK | '1' enables AMC1..12
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.AMC02.ENABLE_MASK | '1' enables AMC1..12
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.AMC03.ENABLE_MASK | '1' enables AMC1..12
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.AMC04.ENABLE_MASK | '1' enables AMC1..12
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.AMC05.ENABLE_MASK | '1' enables AMC1..12
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.AMC06.ENABLE_MASK | '1' enables AMC1..12
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.AMC07.ENABLE_MASK | '1' enables AMC1..12
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.AMC08.ENABLE_MASK | '1' enables AMC1..12
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.AMC09.ENABLE_MASK | '1' enables AMC1..12
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.AMC10.ENABLE_MASK | '1' enables AMC1..12
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.AMC11.ENABLE_MASK | '1' enables AMC1..12
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000008 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.BC0_WORKS_ONLY_ONCE | if '1'', TTC BC0 command works only once after reset
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000008 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.BCN_OFFSET | BcN offset
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000009 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.CAL_ENABLE | Enable calibration events in orbit gap (HCAL), default '1'
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000009 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.CAL_WINDOW_LOWER | read only entire lower window limit
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000009 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.CAL_WINDOW_LOWER_FIXED | fixed as '110110'
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000009 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.CAL_WINDOW_LOWER_PROG | settable part of calibration window lower limit,3456 minimum(not included), default to '011101'
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000009 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.CAL_WINDOW_UPPER | read only entire upper window limit
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000009 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.CAL_WINDOW_UPPER_FIXED | fixed as '110110'
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000009 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.CAL_WINDOW_UPPER_PROG | settable part of calibration window upper limit,3519 maximum(included), default to '100110'
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000001 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.DIAG.DISABLE_EVB | if '1', pauses event building. For debugging only
|
0x00000001 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.DIAG.ENABLE_MEMTEST | '1' enables memory self test
|
0x00000001 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.DIAG.FAKE_TTC_ENABLE | if '1', TTS output is 80MHz clock which can be looped back to TTC input
|
0x00000001 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.DIAG.FORCE_CRC | If '1', inject CRC errors when Evn[7:0] = 0xff for test
|
0x00000001 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.DIAG.MEMTEST_COUNTER | if '0', memory test uses 64bit PRBS. If '1', uses 32 bit sequencial numbers.
|
0x00000001 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.DIAG.TTS_TEST_ENABLE | if '1', TTS test mode (outputs from TTS_TEST_PATTERN)
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000001 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.ENABLE_WARNING_DUE_TO_DAQ_TTS | Enable warning due to daq TTS state (0x6)
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000001 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.EVB.DISABLE_RESYNC_FAKES | If '1', disable fake event generation after TTC resync
|
0x00000001 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.EVB.ENABLE_DAQLSC | '1' enables DAQLSC
|
0x00000002 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.EVB.ENABLE_MASKED_EVN | If set to '1', bit 22-19 determine which events will be saved
|
0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.EVB.IGNORE_DAQ_DATA | '1' to ignore DAQ data (TTS still working)
|
0x00000001 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.EVB.MON_FULL_OVERWRITE | If '1', overwrite old events in monitor buffer when full
|
0x00000001 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.EVB.MON_FULL_STOP_EVB | if '1', monitor buffer full will stop event builder
|
0x00000002 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.EVB.SELECT_MASKED_EVN | Value n=0..15, save events with EvN low (20-n) bits '0'
|
0x00000002 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.EVB.SET_MON_PRESCALE | scale factor( = contents + 1). Note: if bit 18 is set to '1', these bits are ignored.
|
0x000000f0 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.EVB.STOP_ON_AMC_CRC | Stop mon buffer on AMC CRC error
|
0x000000f0 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.EVB.STOP_ON_AMC_LEN_ERR | Stop mon buffer on AMC length error
|
0x000000f0 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.EVB.STOP_ON_CMS_CRC | Stop mon buffer on CMS CRC error
|
0x000000f0 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.EVB.STOP_ON_CMS_LEN_ERR | Stop mon buffer on CMS length error
|
0x00000002 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.EVB.STOP_ON_CRC_ERR | If '1', stop monitor buffer write on AMC CRC error
|
0x000000f0 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.EVB.STOP_ON_MISMATCH | Stop mon buffer on EvN/OrN/BcN mismatch
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000004 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.ID.FED_ID | SLINK ID (bits 17-16 always '0')
|
0x00000007 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.ID.SFP0.SOURCE_ID | CMS Source ID for SFP0 output data
|
0x00000011 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.ID.SFP1.SOURCE_ID | CMS Source ID for SFP1 output data
|
0x00000012 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.ID.SFP2.SOURCE_ID | CMS Source ID for SFP2 output data
|
0x00000007 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.ID.SOURCE_ID | CMS Source ID for output data
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000001 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LOCAL_TRIG.FAKE_DATA_ENABLE | if '1', generate fake event upon receiving L1A
|
0x00000028 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LOCAL_TRIG.GAP_BEGIN | Beginning of orbit gap; triggers excluded
|
0x00000029 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LOCAL_TRIG.GAP_END | End of orbit gap; triggers excluded
|
0x0000001c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LOCAL_TRIG.NUM_TRIG | Local L1A burst length (N+1) so =0 means 1 L1A
|
0x0000001c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LOCAL_TRIG.RATE | Local L1A rate. L1A every N+1 orbits@BcN=0x1f4, N+1 BX or 2*N's random
|
0x0000001c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LOCAL_TRIG.RULES | Local L1A trig rules: 0=all, 1=all but rule 4, 2=rules 1+2, 3=only rule 1
|
0x0000001c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LOCAL_TRIG.TYPE | Local L1A type: 0=per orbit 2=per BX 3=random
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000019 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC.TRIGGER_MASK | AMC Trigger Mask Register
|
0x00001000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC01.BIT0.TRIGGER_MASK | HCAL Trigger mask AMC01 Bit 0
|
0x00001003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC01.BIT1.TRIGGER_MASK | HCAL Trigger mask AMC01 Bit 1
|
0x00001006 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC01.BIT2.TRIGGER_MASK | HCAL Trigger mask AMC01 Bit 2
|
0x00001009 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC01.BIT3.TRIGGER_MASK | HCAL Trigger mask AMC01 Bit 3
|
0x0000100c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC01.BIT4.TRIGGER_MASK | HCAL Trigger mask AMC01 Bit 4
|
0x0000100f |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC01.BIT5.TRIGGER_MASK | HCAL Trigger mask AMC01 Bit 5
|
0x00001012 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC01.BIT6.TRIGGER_MASK | HCAL Trigger mask AMC01 Bit 6
|
0x00001015 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC01.BIT7.TRIGGER_MASK | HCAL Trigger mask AMC01 Bit 7
|
0x00001000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC02.BIT0.TRIGGER_MASK | HCAL Trigger mask AMC02 Bit 0
|
0x00001003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC02.BIT1.TRIGGER_MASK | HCAL Trigger mask AMC02 Bit 1
|
0x00001006 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC02.BIT2.TRIGGER_MASK | HCAL Trigger mask AMC02 Bit 2
|
0x00001009 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC02.BIT3.TRIGGER_MASK | HCAL Trigger mask AMC02 Bit 3
|
0x0000100c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC02.BIT4.TRIGGER_MASK | HCAL Trigger mask AMC02 Bit 4
|
0x0000100f |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC02.BIT5.TRIGGER_MASK | HCAL Trigger mask AMC02 Bit 5
|
0x00001012 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC02.BIT6.TRIGGER_MASK | HCAL Trigger mask AMC02 Bit 6
|
0x00001015 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC02.BIT7.TRIGGER_MASK | HCAL Trigger mask AMC02 Bit 7
|
0x00001000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC03.BIT0.TRIGGER_MASK | HCAL Trigger mask AMC03 Bit 0
|
0x00001003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC03.BIT1.TRIGGER_MASK | HCAL Trigger mask AMC03 Bit 1
|
0x00001006 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC03.BIT2.TRIGGER_MASK | HCAL Trigger mask AMC03 Bit 2
|
0x00001009 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC03.BIT3.TRIGGER_MASK | HCAL Trigger mask AMC03 Bit 3
|
0x0000100c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC03.BIT4.TRIGGER_MASK | HCAL Trigger mask AMC03 Bit 4
|
0x0000100f |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC03.BIT5.TRIGGER_MASK | HCAL Trigger mask AMC03 Bit 5
|
0x00001012 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC03.BIT6.TRIGGER_MASK | HCAL Trigger mask AMC03 Bit 6
|
0x00001015 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC03.BIT7.TRIGGER_MASK | HCAL Trigger mask AMC03 Bit 7
|
0x00001000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC04.BIT0.TRIGGER_MASK | HCAL Trigger mask AMC04 Bit 0
|
0x00001003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC04.BIT1.TRIGGER_MASK | HCAL Trigger mask AMC04 Bit 1
|
0x00001006 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC04.BIT2.TRIGGER_MASK | HCAL Trigger mask AMC04 Bit 2
|
0x00001009 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC04.BIT3.TRIGGER_MASK | HCAL Trigger mask AMC04 Bit 3
|
0x0000100c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC04.BIT4.TRIGGER_MASK | HCAL Trigger mask AMC04 Bit 4
|
0x0000100f |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC04.BIT5.TRIGGER_MASK | HCAL Trigger mask AMC04 Bit 5
|
0x00001012 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC04.BIT6.TRIGGER_MASK | HCAL Trigger mask AMC04 Bit 6
|
0x00001015 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC04.BIT7.TRIGGER_MASK | HCAL Trigger mask AMC04 Bit 7
|
0x00001001 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC05.BIT0.TRIGGER_MASK | HCAL Trigger mask AMC05 Bit 0
|
0x00001004 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC05.BIT1.TRIGGER_MASK | HCAL Trigger mask AMC05 Bit 1
|
0x00001007 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC05.BIT2.TRIGGER_MASK | HCAL Trigger mask AMC05 Bit 2
|
0x0000100a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC05.BIT3.TRIGGER_MASK | HCAL Trigger mask AMC05 Bit 3
|
0x0000100d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC05.BIT4.TRIGGER_MASK | HCAL Trigger mask AMC05 Bit 4
|
0x00001010 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC05.BIT5.TRIGGER_MASK | HCAL Trigger mask AMC05 Bit 5
|
0x00001013 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC05.BIT6.TRIGGER_MASK | HCAL Trigger mask AMC05 Bit 6
|
0x00001016 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC05.BIT7.TRIGGER_MASK | HCAL Trigger mask AMC05 Bit 7
|
0x00001001 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC06.BIT0.TRIGGER_MASK | HCAL Trigger mask AMC06 Bit 0
|
0x00001004 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC06.BIT1.TRIGGER_MASK | HCAL Trigger mask AMC06 Bit 1
|
0x00001007 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC06.BIT2.TRIGGER_MASK | HCAL Trigger mask AMC06 Bit 2
|
0x0000100a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC06.BIT3.TRIGGER_MASK | HCAL Trigger mask AMC06 Bit 3
|
0x0000100d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC06.BIT4.TRIGGER_MASK | HCAL Trigger mask AMC06 Bit 4
|
0x00001010 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC06.BIT5.TRIGGER_MASK | HCAL Trigger mask AMC06 Bit 5
|
0x00001013 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC06.BIT6.TRIGGER_MASK | HCAL Trigger mask AMC06 Bit 6
|
0x00001016 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC06.BIT7.TRIGGER_MASK | HCAL Trigger mask AMC06 Bit 7
|
0x00001001 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC07.BIT0.TRIGGER_MASK | HCAL Trigger mask AMC07 Bit 0
|
0x00001004 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC07.BIT1.TRIGGER_MASK | HCAL Trigger mask AMC07 Bit 1
|
0x00001007 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC07.BIT2.TRIGGER_MASK | HCAL Trigger mask AMC07 Bit 2
|
0x0000100a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC07.BIT3.TRIGGER_MASK | HCAL Trigger mask AMC07 Bit 3
|
0x0000100d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC07.BIT4.TRIGGER_MASK | HCAL Trigger mask AMC07 Bit 4
|
0x00001010 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC07.BIT5.TRIGGER_MASK | HCAL Trigger mask AMC07 Bit 5
|
0x00001013 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC07.BIT6.TRIGGER_MASK | HCAL Trigger mask AMC07 Bit 6
|
0x00001016 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC07.BIT7.TRIGGER_MASK | HCAL Trigger mask AMC07 Bit 7
|
0x00001001 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC08.BIT0.TRIGGER_MASK | HCAL Trigger mask AMC08 Bit 0
|
0x00001004 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC08.BIT1.TRIGGER_MASK | HCAL Trigger mask AMC08 Bit 1
|
0x00001007 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC08.BIT2.TRIGGER_MASK | HCAL Trigger mask AMC08 Bit 2
|
0x0000100a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC08.BIT3.TRIGGER_MASK | HCAL Trigger mask AMC08 Bit 3
|
0x0000100d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC08.BIT4.TRIGGER_MASK | HCAL Trigger mask AMC08 Bit 4
|
0x00001010 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC08.BIT5.TRIGGER_MASK | HCAL Trigger mask AMC08 Bit 5
|
0x00001013 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC08.BIT6.TRIGGER_MASK | HCAL Trigger mask AMC08 Bit 6
|
0x00001016 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC08.BIT7.TRIGGER_MASK | HCAL Trigger mask AMC08 Bit 7
|
0x00001002 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC09.BIT0.TRIGGER_MASK | HCAL Trigger mask AMC09 Bit 0
|
0x00001005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC09.BIT1.TRIGGER_MASK | HCAL Trigger mask AMC09 Bit 1
|
0x00001008 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC09.BIT2.TRIGGER_MASK | HCAL Trigger mask AMC09 Bit 2
|
0x0000100b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC09.BIT3.TRIGGER_MASK | HCAL Trigger mask AMC09 Bit 3
|
0x0000100e |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC09.BIT4.TRIGGER_MASK | HCAL Trigger mask AMC09 Bit 4
|
0x00001011 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC09.BIT5.TRIGGER_MASK | HCAL Trigger mask AMC09 Bit 5
|
0x00001014 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC09.BIT6.TRIGGER_MASK | HCAL Trigger mask AMC09 Bit 6
|
0x00001017 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC09.BIT7.TRIGGER_MASK | HCAL Trigger mask AMC09 Bit 7
|
0x00001002 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC10.BIT0.TRIGGER_MASK | HCAL Trigger mask AMC10 Bit 0
|
0x00001005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC10.BIT1.TRIGGER_MASK | HCAL Trigger mask AMC10 Bit 1
|
0x00001008 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC10.BIT2.TRIGGER_MASK | HCAL Trigger mask AMC10 Bit 2
|
0x0000100b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC10.BIT3.TRIGGER_MASK | HCAL Trigger mask AMC10 Bit 3
|
0x0000100e |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC10.BIT4.TRIGGER_MASK | HCAL Trigger mask AMC10 Bit 4
|
0x00001011 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC10.BIT5.TRIGGER_MASK | HCAL Trigger mask AMC10 Bit 5
|
0x00001014 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC10.BIT6.TRIGGER_MASK | HCAL Trigger mask AMC10 Bit 6
|
0x00001017 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC10.BIT7.TRIGGER_MASK | HCAL Trigger mask AMC10 Bit 7
|
0x00001002 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC11.BIT0.TRIGGER_MASK | HCAL Trigger mask AMC11 Bit 0
|
0x00001005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC11.BIT1.TRIGGER_MASK | HCAL Trigger mask AMC11 Bit 1
|
0x00001008 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC11.BIT2.TRIGGER_MASK | HCAL Trigger mask AMC11 Bit 2
|
0x0000100b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC11.BIT3.TRIGGER_MASK | HCAL Trigger mask AMC11 Bit 3
|
0x0000100e |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC11.BIT4.TRIGGER_MASK | HCAL Trigger mask AMC11 Bit 4
|
0x00001011 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC11.BIT5.TRIGGER_MASK | HCAL Trigger mask AMC11 Bit 5
|
0x00001014 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC11.BIT6.TRIGGER_MASK | HCAL Trigger mask AMC11 Bit 6
|
0x00001017 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC11.BIT7.TRIGGER_MASK | HCAL Trigger mask AMC11 Bit 7
|
0x00001002 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC12.BIT0.TRIGGER_MASK | HCAL Trigger mask AMC12 Bit 0
|
0x00001005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC12.BIT1.TRIGGER_MASK | HCAL Trigger mask AMC12 Bit 1
|
0x00001008 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC12.BIT2.TRIGGER_MASK | HCAL Trigger mask AMC12 Bit 2
|
0x0000100b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC12.BIT3.TRIGGER_MASK | HCAL Trigger mask AMC12 Bit 3
|
0x0000100e |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC12.BIT4.TRIGGER_MASK | HCAL Trigger mask AMC12 Bit 4
|
0x00001011 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC12.BIT5.TRIGGER_MASK | HCAL Trigger mask AMC12 Bit 5
|
0x00001014 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC12.BIT6.TRIGGER_MASK | HCAL Trigger mask AMC12 Bit 6
|
0x00001017 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.AMC12.BIT7.TRIGGER_MASK | HCAL Trigger mask AMC12 Bit 7
|
0x00001018 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.BIT0.TRIGGER_THRESHOLD | HCAL Trigger threshold for bit 0
|
0x00001019 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.BIT1.TRIGGER_THRESHOLD | HCAL Trigger threshold for bit 1
|
0x0000101a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.BIT2.TRIGGER_THRESHOLD | HCAL Trigger threshold for bit 2
|
0x0000101b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.BIT3.TRIGGER_THRESHOLD | HCAL Trigger threshold for bit 3
|
0x0000101c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.BIT4.TRIGGER_THRESHOLD | HCAL Trigger threshold for bit 4
|
0x0000101d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.BIT5.TRIGGER_THRESHOLD | HCAL Trigger threshold for bit 5
|
0x0000101e |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.BIT6.TRIGGER_THRESHOLD | HCAL Trigger threshold for bit 6
|
0x0000101f |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.BIT7.TRIGGER_THRESHOLD | HCAL Trigger threshold for bit 7
|
0x00001040 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.INT_TRIGGER_MASK | Mask local trigger output of corresponding internal trigger
|
0x00001020 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.LTRIG.PRBS_SEL | HCAL Trigger test mode PRB select
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000008 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.ORN_OFFSET | OrN offset
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000001 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.RUN | run mode
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000004 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.SFP.DISABLE_TTS | '1' disables TTS transmitter
|
0x00000004 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.SFP.DISABLE_TX_MASK | '1' disables SFP0..2 transmitter
|
0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.SFP.ENABLE_MASK | '1' enables SFP0..2
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000006 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BC0_OFFSET | Set BX offset for AMC inputs
|
0x0000002e |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO.L1A_OFFSET | Delay from end of TTC command to L1A if enabled in BX
|
0x00000024 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO0.BX | Starting BX for BGO channel 0
|
0x00000020 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO0.COMMAND | Short or long TTC command for BGO channel 0
|
0x00000024 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO0.ENABLE | Enable BGO channel 0 for repeated command
|
0x00000024 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO0.ENABLE_L1A | '1' for L1A after TTC command
|
0x00000024 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO0.ENABLE_REPEAT | Enable BGO channel 0 for repeated command
|
0x00000024 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO0.ENABLE_SINGLE | '1' for single command only
|
0x00000024 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO0.LONG_CMD | '1' for long command on BGO channel 0
|
0x00000024 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO0.ORBIT_PRESCALE | Orbit prescale-1 for BGO channel 0
|
0x00000025 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO1.BX | Starting BX for BGO channel 1
|
0x00000021 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO1.COMMAND | Short or long TTC command for BGO channel 1
|
0x00000025 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO1.ENABLE | Enable BGO channel 1 for repeated command
|
0x00000025 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO1.ENABLE_L1A | '1' for L1A after TTC command
|
0x00000025 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO1.ENABLE_REPEAT | Enable BGO channel 1 for repeated command
|
0x00000025 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO1.ENABLE_SINGLE | '1' for single command only
|
0x00000025 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO1.LONG_CMD | '1' for long command on BGO channel 1
|
0x00000025 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO1.ORBIT_PRESCALE | Orbit prescale-1 for BGO channel 1
|
0x00000026 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO2.BX | Starting BX for BGO channel 2
|
0x00000022 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO2.COMMAND | Short or long TTC command for BGO channel 2
|
0x00000026 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO2.ENABLE | Enable BGO channel 2 for repeated command
|
0x00000026 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO2.ENABLE_L1A | '1' for L1A after TTC command
|
0x00000026 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO2.ENABLE_REPEAT | Enable BGO channel 2 for repeated command
|
0x00000026 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO2.ENABLE_SINGLE | '1' for single command only
|
0x00000026 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO2.LONG_CMD | '1' for long command on BGO channel 2
|
0x00000026 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO2.ORBIT_PRESCALE | Orbit prescale-1 for BGO channel 2
|
0x00000027 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO3.BX | Starting BX for BGO channel 3
|
0x00000023 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO3.COMMAND | Short or long TTC command for BGO channel 3
|
0x00000027 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO3.ENABLE | Enable BGO channel 3 for repeated command
|
0x00000027 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO3.ENABLE_L1A | '1' for L1A after TTC command
|
0x00000027 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO3.ENABLE_REPEAT | Enable BGO channel 3 for repeated command
|
0x00000027 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO3.ENABLE_SINGLE | '1' for single command only
|
0x00000027 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO3.LONG_CMD | '1' for long command on BGO channel 3
|
0x00000027 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.BGO3.ORBIT_PRESCALE | Orbit prescale-1 for BGO channel 3
|
0x0000002d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.DBUFFER.COMMAND | Double buffer TTC command
|
0x0000002d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.DBUFFER.MASK | Ignore '1' bits when comparing dbl buffer TTC command
|
0x00000001 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.ENABLE_BGO | '1' enables locally generated 'BGO' commands
|
0x00000001 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.ENABLE_INTERNAL_L1A | if '1', uses internally generated L1A
|
0x0000002a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.OCR_COMMAND | Orbit count reset TTC command
|
0x0000002a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.OCR_MASK | Ignore '1' bits when comparing orbit count reset TTC command
|
0x0000002b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.RESYNC.COMMAND | Resync TTC command
|
0x0000002b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.RESYNC.MASK | Ignore '1' bits when comparing resync TTC command
|
0x00000001 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTC.T3_TRIG | If '1', accept triggers from T3 (ENABLE_INTERNAL_L1A must also be '1')
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000019 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONF.TTS_TEST_PATTERN | TTS output test pattern
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x08000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FULL_MEMORY | full memory read/write access. (write disabled in run mode) thru 0xfffffff
|
0x00020000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MONITOR_BUFFER_RAM | event buffer for first event builder
|
0x0002a000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MONITOR_BUFFER_RAM_SFP1A | event buffer for 1/3 event builders
|
0x00030000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MONITOR_BUFFER_RAM_SFP1B | event buffer for 2/2 event builders
|
0x00034000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MONITOR_BUFFER_RAM_SFP2 | event buffer for 2/3 event builders
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000e0f |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC.AMC_CRC_ERR | AMC even CRC error detected
|
0x00000006 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC.BC0_LOCKED_MASK | AMC1..12 BC0 locked
|
0x00000e17 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC.FAKE_EMPTY_CNT | AMC_if status fake empty count
|
0x00000e16 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC.FAKE_EVENT_CNT | AMC_if status fake event count
|
0x00000e15 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC.FAKE_HEADER_CNT | AMC_if status fake header count
|
0x00000e14 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC.FAKE_WORD_CNT | AMC_if status fake word count
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC.LINK_VERS_WRONG_MASK | '1' AMC1..12 link version wrong
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC.LOSS_OF_SYNC_MASK | '0' AMC1..12 loss of sync
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC01.AMC_LINK_READY_MASK | '1' indicates AMC1..12 Link Ready
|
0x00000006 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC01.BC0_LOCKED_MASK | AMC1..12 BC0 locked (local trigger only)
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC01.BC0_LOCKED_MASK | 1 if corresponding AMC enabled and BC0 locked
|
0x00000e20 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC01.BP_CRC_ERR | Backplane link CRC error
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC01.BUFFER_OVERFLOW | Buffer overflow on backplane link
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC01.BUFFER_UNDERFLOW | Buffer underflow on backplane link
|
0x00000800 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC01.COUNTERS | module=file://AMCCounters.xml
|
0x00000f00 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC01.FAKES_DURING_RESYNC | Fake events generated during resync
|
0x00000e40 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC01.LINK | module=file://AMCLinks.xml
|
0x00000e0c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC01.LINK_BUFFER_FULL | AMC_LINK buffer is full
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC01.LINK_VERS_WRONG_MASK | '1' AMC1..12 link version wrong
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC01.LOSS_OF_SYNC_MASK | '0' AMC1..12 loss of sync
|
0x00000f40 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC01.STATE | module=file://AMCStateCounters.xml
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC01.TTC_LOCKED_MASK | 1 if corresponding AMC enabled and TTC locked
|
0x00000e1a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC01.TTS_ENCODED | MSB..LSB: DIS,ERR,SYN,BSY,OFW
|
0x00000e47 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC01.TTS_RAW | Raw TTS from AMC
|
0x00000e1a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC01.WAS_DISC | TTC was in disconnected state
|
0x00000e1a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC01.WAS_ERR | TTC was in error state
|
0x00000e1a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC01.WAS_SYN | TTC was in sync lost state
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC02.AMC_LINK_READY_MASK | '1' indicates AMC1..12 Link Ready
|
0x00000006 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC02.BC0_LOCKED_MASK | AMC1..12 BC0 locked (local trigger only)
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC02.BC0_LOCKED_MASK | 1 if corresponding AMC enabled and BC0 locked
|
0x00000e21 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC02.BP_CRC_ERR | Backplane link CRC error
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC02.BUFFER_OVERFLOW | Buffer overflow on backplane link
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC02.BUFFER_UNDERFLOW | Buffer underflow on backplane link
|
0x00000880 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC02.COUNTERS | module=file://AMCCounters.xml
|
0x00000f01 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC02.FAKES_DURING_RESYNC | Fake events generated during resync
|
0x00000e50 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC02.LINK | module=file://AMCLinks.xml
|
0x00000e0c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC02.LINK_BUFFER_FULL | AMC_LINK buffer is full
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC02.LINK_VERS_WRONG_MASK | '1' AMC1..12 link version wrong
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC02.LOSS_OF_SYNC_MASK | '0' AMC1..12 loss of sync
|
0x00000f50 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC02.STATE | module=file://AMCStateCounters.xml
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC02.TTC_LOCKED_MASK | 1 if corresponding AMC enabled and TTC locked
|
0x00000e1a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC02.TTS_ENCODED | MSB..LSB: DIS,ERR,SYN,BSY,OFW
|
0x00000e57 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC02.TTS_RAW | Raw TTS from AMC
|
0x00000e1a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC02.WAS_DISC | TTC was in disconnected state
|
0x00000e1a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC02.WAS_ERR | TTC was in error state
|
0x00000e1a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC02.WAS_SYN | TTC was in sync lost state
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC03.AMC_LINK_READY_MASK | '1' indicates AMC1..12 Link Ready
|
0x00000006 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC03.BC0_LOCKED_MASK | AMC1..12 BC0 locked (local trigger only)
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC03.BC0_LOCKED_MASK | 1 if corresponding AMC enabled and BC0 locked
|
0x00000e22 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC03.BP_CRC_ERR | Backplane link CRC error
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC03.BUFFER_OVERFLOW | Buffer overflow on backplane link
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC03.BUFFER_UNDERFLOW | Buffer underflow on backplane link
|
0x00000900 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC03.COUNTERS | module=file://AMCCounters.xml
|
0x00000f02 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC03.FAKES_DURING_RESYNC | Fake events generated during resync
|
0x00000e60 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC03.LINK | module=file://AMCLinks.xml
|
0x00000e0c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC03.LINK_BUFFER_FULL | AMC_LINK buffer is full
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC03.LINK_VERS_WRONG_MASK | '1' AMC1..12 link version wrong
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC03.LOSS_OF_SYNC_MASK | '0' AMC1..12 loss of sync
|
0x00000f60 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC03.STATE | module=file://AMCStateCounters.xml
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC03.TTC_LOCKED_MASK | 1 if corresponding AMC enabled and TTC locked
|
0x00000e1a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC03.TTS_ENCODED | MSB..LSB: DIS,ERR,SYN,BSY,OFW
|
0x00000e67 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC03.TTS_RAW | Raw TTS from AMC
|
0x00000e1a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC03.WAS_DISC | TTC was in disconnected state
|
0x00000e1a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC03.WAS_ERR | TTC was in error state
|
0x00000e1a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC03.WAS_SYN | TTC was in sync lost state
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC04.AMC_LINK_READY_MASK | '1' indicates AMC1..12 Link Ready
|
0x00000006 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC04.BC0_LOCKED_MASK | AMC1..12 BC0 locked (local trigger only)
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC04.BC0_LOCKED_MASK | 1 if corresponding AMC enabled and BC0 locked
|
0x00000e23 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC04.BP_CRC_ERR | Backplane link CRC error
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC04.BUFFER_OVERFLOW | Buffer overflow on backplane link
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC04.BUFFER_UNDERFLOW | Buffer underflow on backplane link
|
0x00000980 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC04.COUNTERS | module=file://AMCCounters.xml
|
0x00000f03 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC04.FAKES_DURING_RESYNC | Fake events generated during resync
|
0x00000e70 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC04.LINK | module=file://AMCLinks.xml
|
0x00000e0c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC04.LINK_BUFFER_FULL | AMC_LINK buffer is full
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC04.LINK_VERS_WRONG_MASK | '1' AMC1..12 link version wrong
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC04.LOSS_OF_SYNC_MASK | '0' AMC1..12 loss of sync
|
0x00000f70 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC04.STATE | module=file://AMCStateCounters.xml
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC04.TTC_LOCKED_MASK | 1 if corresponding AMC enabled and TTC locked
|
0x00000e1a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC04.TTS_ENCODED | MSB..LSB: DIS,ERR,SYN,BSY,OFW
|
0x00000e77 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC04.TTS_RAW | Raw TTS from AMC
|
0x00000e1a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC04.WAS_DISC | TTC was in disconnected state
|
0x00000e1a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC04.WAS_ERR | TTC was in error state
|
0x00000e1a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC04.WAS_SYN | TTC was in sync lost state
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC05.AMC_LINK_READY_MASK | '1' indicates AMC1..12 Link Ready
|
0x00000006 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC05.BC0_LOCKED_MASK | AMC1..12 BC0 locked (local trigger only)
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC05.BC0_LOCKED_MASK | 1 if corresponding AMC enabled and BC0 locked
|
0x00000e24 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC05.BP_CRC_ERR | Backplane link CRC error
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC05.BUFFER_OVERFLOW | Buffer overflow on backplane link
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC05.BUFFER_UNDERFLOW | Buffer underflow on backplane link
|
0x00000a00 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC05.COUNTERS | module=file://AMCCounters.xml
|
0x00000f04 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC05.FAKES_DURING_RESYNC | Fake events generated during resync
|
0x00000e80 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC05.LINK | module=file://AMCLinks.xml
|
0x00000e0c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC05.LINK_BUFFER_FULL | AMC_LINK buffer is full
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC05.LINK_VERS_WRONG_MASK | '1' AMC1..12 link version wrong
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC05.LOSS_OF_SYNC_MASK | '0' AMC1..12 loss of sync
|
0x00000f80 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC05.STATE | module=file://AMCStateCounters.xml
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC05.TTC_LOCKED_MASK | 1 if corresponding AMC enabled and TTC locked
|
0x00000e1b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC05.TTS_ENCODED | MSB..LSB: DIS,ERR,SYN,BSY,OFW
|
0x00000e87 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC05.TTS_RAW | Raw TTS from AMC
|
0x00000e1b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC05.WAS_DISC | TTC was in disconnected state
|
0x00000e1b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC05.WAS_ERR | TTC was in error state
|
0x00000e1b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC05.WAS_SYN | TTC was in sync lost state
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC06.AMC_LINK_READY_MASK | '1' indicates AMC1..12 Link Ready
|
0x00000006 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC06.BC0_LOCKED_MASK | AMC1..12 BC0 locked (local trigger only)
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC06.BC0_LOCKED_MASK | 1 if corresponding AMC enabled and BC0 locked
|
0x00000e25 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC06.BP_CRC_ERR | Backplane link CRC error
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC06.BUFFER_OVERFLOW | Buffer overflow on backplane link
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC06.BUFFER_UNDERFLOW | Buffer underflow on backplane link
|
0x00000a80 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC06.COUNTERS | module=file://AMCCounters.xml
|
0x00000f05 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC06.FAKES_DURING_RESYNC | Fake events generated during resync
|
0x00000e90 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC06.LINK | module=file://AMCLinks.xml
|
0x00000e0c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC06.LINK_BUFFER_FULL | AMC_LINK buffer is full
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC06.LINK_VERS_WRONG_MASK | '1' AMC1..12 link version wrong
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC06.LOSS_OF_SYNC_MASK | '0' AMC1..12 loss of sync
|
0x00000f90 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC06.STATE | module=file://AMCStateCounters.xml
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC06.TTC_LOCKED_MASK | 1 if corresponding AMC enabled and TTC locked
|
0x00000e1b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC06.TTS_ENCODED | MSB..LSB: DIS,ERR,SYN,BSY,OFW
|
0x00000e97 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC06.TTS_RAW | Raw TTS from AMC
|
0x00000e1b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC06.WAS_DISC | TTC was in disconnected state
|
0x00000e1b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC06.WAS_ERR | TTC was in error state
|
0x00000e1b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC06.WAS_SYN | TTC was in sync lost state
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC07.AMC_LINK_READY_MASK | '1' indicates AMC1..12 Link Ready
|
0x00000006 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC07.BC0_LOCKED_MASK | AMC1..12 BC0 locked (local trigger only)
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC07.BC0_LOCKED_MASK | 1 if corresponding AMC enabled and BC0 locked
|
0x00000e26 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC07.BP_CRC_ERR | Backplane link CRC error
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC07.BUFFER_OVERFLOW | Buffer overflow on backplane link
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC07.BUFFER_UNDERFLOW | Buffer underflow on backplane link
|
0x00000b00 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC07.COUNTERS | module=file://AMCCounters.xml
|
0x00000f06 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC07.FAKES_DURING_RESYNC | Fake events generated during resync
|
0x00000ea0 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC07.LINK | module=file://AMCLinks.xml
|
0x00000e0c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC07.LINK_BUFFER_FULL | AMC_LINK buffer is full
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC07.LINK_VERS_WRONG_MASK | '1' AMC1..12 link version wrong
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC07.LOSS_OF_SYNC_MASK | '0' AMC1..12 loss of sync
|
0x00000fa0 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC07.STATE | module=file://AMCStateCounters.xml
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC07.TTC_LOCKED_MASK | 1 if corresponding AMC enabled and TTC locked
|
0x00000e1b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC07.TTS_ENCODED | MSB..LSB: DIS,ERR,SYN,BSY,OFW
|
0x00000ea7 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC07.TTS_RAW | Raw TTS from AMC
|
0x00000e1b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC07.WAS_DISC | TTC was in disconnected state
|
0x00000e1b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC07.WAS_ERR | TTC was in error state
|
0x00000e1b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC07.WAS_SYN | TTC was in sync lost state
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC08.AMC_LINK_READY_MASK | '1' indicates AMC1..12 Link Ready
|
0x00000006 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC08.BC0_LOCKED_MASK | AMC1..12 BC0 locked (local trigger only)
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC08.BC0_LOCKED_MASK | 1 if corresponding AMC enabled and BC0 locked
|
0x00000e27 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC08.BP_CRC_ERR | Backplane link CRC error
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC08.BUFFER_OVERFLOW | Buffer overflow on backplane link
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC08.BUFFER_UNDERFLOW | Buffer underflow on backplane link
|
0x00000b80 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC08.COUNTERS | module=file://AMCCounters.xml
|
0x00000f07 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC08.FAKES_DURING_RESYNC | Fake events generated during resync
|
0x00000eb0 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC08.LINK | module=file://AMCLinks.xml
|
0x00000e0c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC08.LINK_BUFFER_FULL | AMC_LINK buffer is full
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC08.LINK_VERS_WRONG_MASK | '1' AMC1..12 link version wrong
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC08.LOSS_OF_SYNC_MASK | '0' AMC1..12 loss of sync
|
0x00000fb0 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC08.STATE | module=file://AMCStateCounters.xml
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC08.TTC_LOCKED_MASK | 1 if corresponding AMC enabled and TTC locked
|
0x00000e1b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC08.TTS_ENCODED | MSB..LSB: DIS,ERR,SYN,BSY,OFW
|
0x00000eb7 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC08.TTS_RAW | Raw TTS from AMC
|
0x00000e1b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC08.WAS_DISC | TTC was in disconnected state
|
0x00000e1b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC08.WAS_ERR | TTC was in error state
|
0x00000e1b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC08.WAS_SYN | TTC was in sync lost state
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC09.AMC_LINK_READY_MASK | '1' indicates AMC1..12 Link Ready
|
0x00000006 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC09.BC0_LOCKED_MASK | AMC1..12 BC0 locked (local trigger only)
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC09.BC0_LOCKED_MASK | 1 if corresponding AMC enabled and BC0 locked
|
0x00000e28 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC09.BP_CRC_ERR | Backplane link CRC error
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC09.BUFFER_OVERFLOW | Buffer overflow on backplane link
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC09.BUFFER_UNDERFLOW | Buffer underflow on backplane link
|
0x00000c00 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC09.COUNTERS | module=file://AMCCounters.xml
|
0x00000f08 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC09.FAKES_DURING_RESYNC | Fake events generated during resync
|
0x00000ec0 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC09.LINK | module=file://AMCLinks.xml
|
0x00000e0c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC09.LINK_BUFFER_FULL | AMC_LINK buffer is full
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC09.LINK_VERS_WRONG_MASK | '1' AMC1..12 link version wrong
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC09.LOSS_OF_SYNC_MASK | '0' AMC1..12 loss of sync
|
0x00000fc0 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC09.STATE | module=file://AMCStateCounters.xml
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC09.TTC_LOCKED_MASK | 1 if corresponding AMC enabled and TTC locked
|
0x00000e1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC09.TTS_ENCODED | MSB..LSB: DIS,ERR,SYN,BSY,OFW
|
0x00000ec7 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC09.TTS_RAW | Raw TTS from AMC
|
0x00000e1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC09.WAS_DISC | TTC was in disconnected state
|
0x00000e1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC09.WAS_ERR | TTC was in error state
|
0x00000e1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC09.WAS_SYN | TTC was in sync lost state
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC10.AMC_LINK_READY_MASK | '1' indicates AMC1..12 Link Ready
|
0x00000006 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC10.BC0_LOCKED_MASK | AMC1..12 BC0 locked (local trigger only)
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC10.BC0_LOCKED_MASK | 1 if corresponding AMC enabled and BC0 locked
|
0x00000e29 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC10.BP_CRC_ERR | Backplane link CRC error
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC10.BUFFER_OVERFLOW | Buffer overflow on backplane link
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC10.BUFFER_UNDERFLOW | Buffer underflow on backplane link
|
0x00000c80 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC10.COUNTERS | module=file://AMCCounters.xml
|
0x00000f09 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC10.FAKES_DURING_RESYNC | Fake events generated during resync
|
0x00000ed0 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC10.LINK | module=file://AMCLinks.xml
|
0x00000e0c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC10.LINK_BUFFER_FULL | AMC_LINK buffer is full
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC10.LINK_VERS_WRONG_MASK | '1' AMC1..12 link version wrong
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC10.LOSS_OF_SYNC_MASK | '0' AMC1..12 loss of sync
|
0x00000fd0 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC10.STATE | module=file://AMCStateCounters.xml
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC10.TTC_LOCKED_MASK | 1 if corresponding AMC enabled and TTC locked
|
0x00000e1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC10.TTS_ENCODED | MSB..LSB: DIS,ERR,SYN,BSY,OFW
|
0x00000ed7 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC10.TTS_RAW | Raw TTS from AMC
|
0x00000e1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC10.WAS_DISC | TTC was in disconnected state
|
0x00000e1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC10.WAS_ERR | TTC was in error state
|
0x00000e1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC10.WAS_SYN | TTC was in sync lost state
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC11.AMC_LINK_READY_MASK | '1' indicates AMC1..12 Link Ready
|
0x00000006 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC11.BC0_LOCKED_MASK | AMC1..12 BC0 locked (local trigger only)
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC11.BC0_LOCKED_MASK | 1 if corresponding AMC enabled and BC0 locked
|
0x00000e2a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC11.BP_CRC_ERR | Backplane link CRC error
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC11.BUFFER_OVERFLOW | Buffer overflow on backplane link
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC11.BUFFER_UNDERFLOW | Buffer underflow on backplane link
|
0x00000d00 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC11.COUNTERS | module=file://AMCCounters.xml
|
0x00000f0a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC11.FAKES_DURING_RESYNC | Fake events generated during resync
|
0x00000ee0 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC11.LINK | module=file://AMCLinks.xml
|
0x00000e0c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC11.LINK_BUFFER_FULL | AMC_LINK buffer is full
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC11.LINK_VERS_WRONG_MASK | '1' AMC1..12 link version wrong
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC11.LOSS_OF_SYNC_MASK | '0' AMC1..12 loss of sync
|
0x00000fe0 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC11.STATE | module=file://AMCStateCounters.xml
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC11.TTC_LOCKED_MASK | 1 if corresponding AMC enabled and TTC locked
|
0x00000e1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC11.TTS_ENCODED | MSB..LSB: DIS,ERR,SYN,BSY,OFW
|
0x00000ee7 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC11.TTS_RAW | Raw TTS from AMC
|
0x00000e1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC11.WAS_DISC | TTC was in disconnected state
|
0x00000e1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC11.WAS_ERR | TTC was in error state
|
0x00000e1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC11.WAS_SYN | TTC was in sync lost state
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC12.AMC_LINK_READY_MASK | '1' indicates AMC1..12 Link Ready
|
0x00000006 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC12.BC0_LOCKED_MASK | AMC1..12 BC0 locked (local trigger only)
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC12.BC0_LOCKED_MASK | 1 if corresponding AMC enabled and BC0 locked
|
0x00000e2b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC12.BP_CRC_ERR | Backplane link CRC error
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC12.BUFFER_OVERFLOW | Buffer overflow on backplane link
|
0x00000f1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC12.BUFFER_UNDERFLOW | Buffer underflow on backplane link
|
0x00000d80 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC12.COUNTERS | module=file://AMCCounters.xml
|
0x00000f0b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC12.FAKES_DURING_RESYNC | Fake events generated during resync
|
0x00000ef0 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC12.LINK | module=file://AMCLinks.xml
|
0x00000e0c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC12.LINK_BUFFER_FULL | AMC_LINK buffer is full
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC12.LINK_VERS_WRONG_MASK | '1' AMC1..12 link version wrong
|
0x00000005 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC12.LOSS_OF_SYNC_MASK | '0' AMC1..12 loss of sync
|
0x00000ff0 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC12.STATE | module=file://AMCStateCounters.xml
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC12.TTC_LOCKED_MASK | 1 if corresponding AMC enabled and TTC locked
|
0x00000e1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC12.TTS_ENCODED | MSB..LSB: DIS,ERR,SYN,BSY,OFW
|
0x00000ef7 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC12.TTS_RAW | Raw TTS from AMC
|
0x00000e1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC12.WAS_DISC | TTC was in disconnected state
|
0x00000e1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC12.WAS_ERR | TTC was in error state
|
0x00000e1c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC12.WAS_SYN | TTC was in sync lost state
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC_LINK_READY_MASK | '1' indicates AMC1..12 Link Ready
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC_TTC.BC0_LOCKED_MASK | 1 if corresponding AMC enabled and BC0 locked
|
0x00000e0d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC_TTC.TTC_LOCKED_MASK | 1 if corresponding AMC enabled and TTC locked
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000019 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.AMC_TTS_STATE | encoded TTS from enabled AMCs
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.DIAG.DDR_RESET_FAILED | if 0, DDR memory reset done
|
0x0000000b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.DIAG.DDR_STATUS_HI | memory status register upper word (debug only, read only), bits 0-10 SDRAM write page address (?)
|
0x0000000a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.DIAG.DDR_STATUS_LO | memory status register lower word (debug only, read only)
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000010 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.EVB.DATA_READY_MASK | event data ready in event buffer of event builders
|
0x00000010 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.EVB.DDR3_WRITE_PORT_FULL_MASK | ddr3 event data write port input FIFO full
|
0x00000010 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.EVB.DDR3_WRITE_PORT_READY_MASK | ddr3 event data write port ready
|
0x00000010 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.EVB.EVENT_SIZE_MASK | event size in event buffer of event builders
|
0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.EVB.OVERFLOW_WARNING | L1A overflow warning
|
0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.EVB.SYNC_LOST | TTC sync lost (L1A buffer overflow)
|
0x00000010 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.EVB.TCP_BUFFER_AVAILABLE | TCP buffer available
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000001 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.FIRMWARE_VERS | read only Virtex firmware version
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000030 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.FPGA.DIE_TEMP | V6 die temperature in unit of 0.1 degree Celsius
|
0x0000001f |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.FPGA.DNA_HI |
|
0x0000001e |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.FPGA.DNA_LO | Kintex FPGA DNA
|
0x0000003c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.FPGA.MV_0V75_VREF | 0.75V DDR3_Vref power voltage in millivolt
|
0x0000003b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.FPGA.MV_0V75_VTT | 0.75V DDR3_Vtt power voltage in millivolt
|
0x00000038 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.FPGA.MV_12V0 | 12V power voltage in millivolt
|
0x00000031 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.FPGA.MV_1V0 | 1.0V analog power voltage in millivolt
|
0x0000003e |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.FPGA.MV_1V0_BRAM | 1.0V VccBRAM power voltage in millivolt
|
0x00000033 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.FPGA.MV_1V0_INT | 1.0V Vccint power voltage in millivolt
|
0x00000032 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.FPGA.MV_1V2 | 1.2V analog power voltage in millivolt
|
0x00000034 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.FPGA.MV_1V5 | 1.5V power voltage in millivolt
|
0x0000003d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.FPGA.MV_1V8_AUX | 1.8V VccAux power voltage in millivolt
|
0x00000039 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.FPGA.MV_1V8_GTX | 1.8V VccAuxGTX power voltage in millivolt
|
0x0000003a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.FPGA.MV_2V0 | 2.0V VccAuxIO power voltage in millivolt
|
0x00000035 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.FPGA.MV_2V5 | 2.5V power voltage in millivolt
|
0x00000036 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.FPGA.MV_3V3 | 3.3V power voltage in millivolt
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x0000004d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.BUSY_TIME_HI |
|
0x0000004c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.BUSY_TIME_LO | busy time counter
|
0x00000047 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.L1A_COUNT_HI |
|
0x00000046 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.L1A_COUNT_LO | L1A counter
|
0x0000002c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.L1A_RATE_HZ | L1A rate in Hz
|
0x00000055 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.L1A_WHEN_BSY_HI |
|
0x00000054 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.L1A_WHEN_BSY_LO | L1A received when in BSY state
|
0x00000053 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.L1A_WHEN_OFW_HI |
|
0x00000052 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.L1A_WHEN_OFW_LO | L1A received when in OFW state
|
0x00000057 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.L1A_WHEN_SYN_HI |
|
0x00000056 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.L1A_WHEN_SYN_LO | L1A received when in SYN state
|
0x00000017 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.LIVE_TIME_PCT | Live time (TTS ready) percent
|
0x0000005b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.OF_WARN_TIME_DAQ_BP_HI |
|
0x0000005a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.OF_WARN_TIME_DAQ_BP_LO | L1A overflow warning with DAQ backpressure on time counter
|
0x00000051 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.OF_WARN_TIME_HI |
|
0x00000050 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.OF_WARN_TIME_LO | L1A overflow warning time counter
|
0x0000004b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.READY_TIME_HI |
|
0x0000004a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.READY_TIME_LO | ready time counter
|
0x00000049 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.RUN_TIME_HI |
|
0x00000048 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.RUN_TIME_LO | run time counter
|
0x000000f8 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.SFP0.LIVE_TIME_PCT | Live time (no backpressure) for SFP0
|
0x00000014 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.SFP0_RATE | Data rate /4000 bytes/sec
|
0x000000f9 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.SFP1.LIVE_TIME_PCT | Live time (no backpressure) for SFP1
|
0x00000015 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.SFP1_RATE | Data rate /4000 bytes/sec
|
0x000000fa |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.SFP2.LIVE_TIME_PCT | Live time (no backpressure) for SFP2
|
0x00000016 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.SFP2_RATE | Data rate /4000 bytes/sec
|
0x0000004f |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.SYNC_LOST_TIME_HI |
|
0x0000004e |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.GENERAL.SYNC_LOST_TIME_LO | L1A sync lost time counter
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000200 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.L1A_HISTORY_BUFFER | L1A History buffer
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LOCAL_TRIG.CONTINUOUS_ON | continous local L1A on (setup with register 0x1c)
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x000000c8 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP0.BLOCK_COUNT | word count for SFP0
|
0x000000c0 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP0.BUILT_EVENT_COUNT | SFP0 built event count
|
0x000000b3 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP0.CMS_CRC_ERR | CMS CRC error
|
0x000000b6 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP0.EVENT_LGTH_ERR | Event Length Error
|
0x000000bb |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP0.EVENT_LGTH_SUM_HI | Sum of event lengths
|
0x000000ba |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP0.EVENT_LGTH_SUM_LO | Sum of event lengths
|
0x000000d4 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP0.LINK_FULL_N | SFP0 link full signal from sender core
|
0x000000b0 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP0.SYNC_LOSS_COUNT | SFP0 sync loss count
|
0x000000c4 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP0.WORD_COUNT | event count for SFP0
|
0x000000c9 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP1.BLOCK_COUNT | word count for SFP1
|
0x000000c1 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP1.BUILT_EVENT_COUNT | SFP1 built event count
|
0x000000b4 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP1.CMS_CRC_ERR | CMS CRC error
|
0x000000b7 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP1.EVENT_LGTH_ERR | Event Length Error
|
0x000000bd |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP1.EVENT_LGTH_SUM_HI | Sum of event lengths
|
0x000000bc |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP1.EVENT_LGTH_SUM_LO | Sum of event lengths
|
0x000000d4 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP1.LINK_FULL_N | SFP1 link full signal from sender core
|
0x000000b1 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP1.SYNC_LOSS_COUNT | SFP1 sync loss count
|
0x000000c5 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP1.WORD_COUNT | event count for SFP1
|
0x000000ca |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP2.BLOCK_COUNT | word count for SFP2
|
0x000000c2 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP2.BUILT_EVENT_COUNT | SFP2 built event count
|
0x000000b5 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP2.CMS_CRC_ERR | CMS CRC error
|
0x000000b8 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP2.EVENT_LGTH_ERR | Event Length Error
|
0x000000bf |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP2.EVENT_LGTH_SUM_HI | Sum of event lengths
|
0x000000be |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP2.EVENT_LGTH_SUM_LO | Sum of event lengths
|
0x000000d4 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP2.LINK_FULL_N | SFP2 link full signal from sender core
|
0x000000b2 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP2.SYNC_LOSS_COUNT | SFP2 sync loss count
|
0x000000c6 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LSC.SFP2.WORD_COUNT | event count for SFP2
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00001021 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.PRBS_ERRORS | HCAL Trigger test mode PRBS error count
|
0x00001022 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE00.BC0 | HCAL trigger test rx
|
0x00001022 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE00.BCN | HCAL trigger test rx
|
0x00001022 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE00.DATA | HCAL trigger test rx
|
0x00001022 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE00.ERR | HCAL trigger test rx
|
0x00001022 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE00.VER | HCAL trigger test rx
|
0x00001023 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE01.BC0 | HCAL trigger test rx
|
0x00001023 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE01.BCN | HCAL trigger test rx
|
0x00001023 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE01.DATA | HCAL trigger test rx
|
0x00001023 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE01.ERR | HCAL trigger test rx
|
0x00001023 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE01.VER | HCAL trigger test rx
|
0x00001024 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE02.BC0 | HCAL trigger test rx
|
0x00001024 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE02.BCN | HCAL trigger test rx
|
0x00001024 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE02.DATA | HCAL trigger test rx
|
0x00001024 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE02.ERR | HCAL trigger test rx
|
0x00001024 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE02.VER | HCAL trigger test rx
|
0x00001025 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE03.BC0 | HCAL trigger test rx
|
0x00001025 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE03.BCN | HCAL trigger test rx
|
0x00001025 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE03.DATA | HCAL trigger test rx
|
0x00001025 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE03.ERR | HCAL trigger test rx
|
0x00001025 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE03.VER | HCAL trigger test rx
|
0x00001026 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE04.BC0 | HCAL trigger test rx
|
0x00001026 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE04.BCN | HCAL trigger test rx
|
0x00001026 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE04.DATA | HCAL trigger test rx
|
0x00001026 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE04.ERR | HCAL trigger test rx
|
0x00001026 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE04.VER | HCAL trigger test rx
|
0x00001027 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE05.BC0 | HCAL trigger test rx
|
0x00001027 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE05.BCN | HCAL trigger test rx
|
0x00001027 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE05.DATA | HCAL trigger test rx
|
0x00001027 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE05.ERR | HCAL trigger test rx
|
0x00001027 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE05.VER | HCAL trigger test rx
|
0x00001028 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE06.BC0 | HCAL trigger test rx
|
0x00001028 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE06.BCN | HCAL trigger test rx
|
0x00001028 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE06.DATA | HCAL trigger test rx
|
0x00001028 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE06.ERR | HCAL trigger test rx
|
0x00001028 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE06.VER | HCAL trigger test rx
|
0x00001029 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE07.BC0 | HCAL trigger test rx
|
0x00001029 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE07.BCN | HCAL trigger test rx
|
0x00001029 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE07.DATA | HCAL trigger test rx
|
0x00001029 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE07.ERR | HCAL trigger test rx
|
0x00001029 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE07.VER | HCAL trigger test rx
|
0x0000102a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE08.BC0 | HCAL trigger test rx
|
0x0000102a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE08.BCN | HCAL trigger test rx
|
0x0000102a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE08.DATA | HCAL trigger test rx
|
0x0000102a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE08.ERR | HCAL trigger test rx
|
0x0000102a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE08.VER | HCAL trigger test rx
|
0x0000102b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE09.BC0 | HCAL trigger test rx
|
0x0000102b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE09.BCN | HCAL trigger test rx
|
0x0000102b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE09.DATA | HCAL trigger test rx
|
0x0000102b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE09.ERR | HCAL trigger test rx
|
0x0000102b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE09.VER | HCAL trigger test rx
|
0x0000102c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE10.BC0 | HCAL trigger test rx
|
0x0000102c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE10.BCN | HCAL trigger test rx
|
0x0000102c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE10.DATA | HCAL trigger test rx
|
0x0000102c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE10.ERR | HCAL trigger test rx
|
0x0000102c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE10.VER | HCAL trigger test rx
|
0x0000102d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE11.BC0 | HCAL trigger test rx
|
0x0000102d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE11.BCN | HCAL trigger test rx
|
0x0000102d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE11.DATA | HCAL trigger test rx
|
0x0000102d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE11.ERR | HCAL trigger test rx
|
0x0000102d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE11.VER | HCAL trigger test rx
|
0x0000102e |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE12.BC0 | HCAL trigger test rx
|
0x0000102e |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE12.BCN | HCAL trigger test rx
|
0x0000102e |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE12.DATA | HCAL trigger test rx
|
0x0000102e |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE12.ERR | HCAL trigger test rx
|
0x0000102e |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE12.VER | HCAL trigger test rx
|
0x0000102f |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE13.BC0 | HCAL trigger test rx
|
0x0000102f |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE13.BCN | HCAL trigger test rx
|
0x0000102f |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE13.DATA | HCAL trigger test rx
|
0x0000102f |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE13.ERR | HCAL trigger test rx
|
0x0000102f |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE13.VER | HCAL trigger test rx
|
0x00001030 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE14.BC0 | HCAL trigger test rx
|
0x00001030 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE14.BCN | HCAL trigger test rx
|
0x00001030 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE14.DATA | HCAL trigger test rx
|
0x00001030 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE14.ERR | HCAL trigger test rx
|
0x00001030 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE14.VER | HCAL trigger test rx
|
0x00001031 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE15.BC0 | HCAL trigger test rx
|
0x00001031 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE15.BCN | HCAL trigger test rx
|
0x00001031 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE15.DATA | HCAL trigger test rx
|
0x00001031 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE15.ERR | HCAL trigger test rx
|
0x00001031 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE15.VER | HCAL trigger test rx
|
0x00001032 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE16.BC0 | HCAL trigger test rx
|
0x00001032 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE16.BCN | HCAL trigger test rx
|
0x00001032 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE16.DATA | HCAL trigger test rx
|
0x00001032 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE16.ERR | HCAL trigger test rx
|
0x00001032 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE16.VER | HCAL trigger test rx
|
0x00001033 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE17.BC0 | HCAL trigger test rx
|
0x00001033 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE17.BCN | HCAL trigger test rx
|
0x00001033 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE17.DATA | HCAL trigger test rx
|
0x00001033 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE17.ERR | HCAL trigger test rx
|
0x00001033 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE17.VER | HCAL trigger test rx
|
0x00001034 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE18.BC0 | HCAL trigger test rx
|
0x00001034 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE18.BCN | HCAL trigger test rx
|
0x00001034 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE18.DATA | HCAL trigger test rx
|
0x00001034 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE18.ERR | HCAL trigger test rx
|
0x00001034 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE18.VER | HCAL trigger test rx
|
0x00001035 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE19.BC0 | HCAL trigger test rx
|
0x00001035 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE19.BCN | HCAL trigger test rx
|
0x00001035 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE19.DATA | HCAL trigger test rx
|
0x00001035 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE19.ERR | HCAL trigger test rx
|
0x00001035 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE19.VER | HCAL trigger test rx
|
0x00001036 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE20.BC0 | HCAL trigger test rx
|
0x00001036 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE20.BCN | HCAL trigger test rx
|
0x00001036 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE20.DATA | HCAL trigger test rx
|
0x00001036 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE20.ERR | HCAL trigger test rx
|
0x00001036 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE20.VER | HCAL trigger test rx
|
0x00001037 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE21.BC0 | HCAL trigger test rx
|
0x00001037 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE21.BCN | HCAL trigger test rx
|
0x00001037 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE21.DATA | HCAL trigger test rx
|
0x00001037 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE21.ERR | HCAL trigger test rx
|
0x00001037 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE21.VER | HCAL trigger test rx
|
0x00001038 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE22.BC0 | HCAL trigger test rx
|
0x00001038 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE22.BCN | HCAL trigger test rx
|
0x00001038 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE22.DATA | HCAL trigger test rx
|
0x00001038 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE22.ERR | HCAL trigger test rx
|
0x00001038 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE22.VER | HCAL trigger test rx
|
0x00001039 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE23.BC0 | HCAL trigger test rx
|
0x00001039 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE23.BCN | HCAL trigger test rx
|
0x00001039 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE23.DATA | HCAL trigger test rx
|
0x00001039 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE23.ERR | HCAL trigger test rx
|
0x00001039 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE23.VER | HCAL trigger test rx
|
0x0000103a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE24.BC0 | HCAL trigger test rx
|
0x0000103a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE24.BCN | HCAL trigger test rx
|
0x0000103a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE24.DATA | HCAL trigger test rx
|
0x0000103a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE24.ERR | HCAL trigger test rx
|
0x0000103a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE24.VER | HCAL trigger test rx
|
0x0000103b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE25.BC0 | HCAL trigger test rx
|
0x0000103b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE25.BCN | HCAL trigger test rx
|
0x0000103b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE25.DATA | HCAL trigger test rx
|
0x0000103b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE25.ERR | HCAL trigger test rx
|
0x0000103b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE25.VER | HCAL trigger test rx
|
0x0000103c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE26.BC0 | HCAL trigger test rx
|
0x0000103c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE26.BCN | HCAL trigger test rx
|
0x0000103c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE26.DATA | HCAL trigger test rx
|
0x0000103c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE26.ERR | HCAL trigger test rx
|
0x0000103c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE26.VER | HCAL trigger test rx
|
0x0000103d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE27.BC0 | HCAL trigger test rx
|
0x0000103d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE27.BCN | HCAL trigger test rx
|
0x0000103d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE27.DATA | HCAL trigger test rx
|
0x0000103d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE27.ERR | HCAL trigger test rx
|
0x0000103d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE27.VER | HCAL trigger test rx
|
0x0000103e |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE28.BC0 | HCAL trigger test rx
|
0x0000103e |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE28.BCN | HCAL trigger test rx
|
0x0000103e |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE28.DATA | HCAL trigger test rx
|
0x0000103e |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE28.ERR | HCAL trigger test rx
|
0x0000103e |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE28.VER | HCAL trigger test rx
|
0x0000103f |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE29.BC0 | HCAL trigger test rx
|
0x0000103f |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE29.BCN | HCAL trigger test rx
|
0x0000103f |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE29.DATA | HCAL trigger test rx
|
0x0000103f |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE29.ERR | HCAL trigger test rx
|
0x0000103f |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.LTRIG.SAMPLE29.VER | HCAL trigger test rx
|
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|
---|
0x00000010 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.MONITOR_BUFFER.AVAILABLE | monitor buffer available
|
0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.MONITOR_BUFFER.EMPTY | monitor buffer empty
|
0x0000000d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.MONITOR_BUFFER.EOI_TYPE | all 0 if not in catch mode, otherwise gives the type of error of the bad event
|
0x0000000d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.MONITOR_BUFFER.EVENTS_AFTER_EOI | all 0 if not in catch mode, otherwise gives the number of events stored after the bad event
|
0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.MONITOR_BUFFER.FULL | monitor buffer full
|
0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.MONITOR_BUFFER.OVERFLOW | monitor buffer overflow
|
0x0000000c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.MONITOR_BUFFER.PAGE_NO | SDRAM page number (r/w only when not in run mode)
|
0x0000000e |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.MONITOR_BUFFER.UNREAD_BLOCKS | number of unread blocks captured by monitor
|
0x0000000d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.MONITOR_BUFFER.WORDS_SFP0 | SFP 0 monitored event size in 32-bit word. 0 if no data available
|
0x0000000f |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.MONITOR_BUFFER.WORDS_SFP1 | SFP 1 monitored event size in 32-bit word. 0 if no data available
|
0x0000001d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.MONITOR_BUFFER.WORDS_SFP2 | SFP 2 monitored event size in 32-bit word. 0 if no data available
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SERIAL_HI | Serial Number High one bit
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SERIAL_LO | Serial Number Low eight bits
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SERIAL_NO | T1 board SN
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.ANY_DOWN | reads '1' when any of the enabled SFP ports is down
|
0x00000004 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.RX_SIG_LOST_MASK | '1' indicates SFP0..2 Receiver signal lost
|
0x000000e8 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.CRC_ERR_COUNT | AMC CRC error
|
0x00000e2c |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.EVENTS_BUILT | AMC Events built
|
0x000000e0 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LENGTH_ERRORS | AMC Length error count
|
0x000000ec |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LSC.BACKP_COUNTER_HI | Number of clocks in the LinkFull state
|
0x00000089 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LSC.BACKP_COUNTER_LO | Number of clocks in the LinkFull state
|
0x00000081 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LSC.BLOCKS_FREE | '1' at least one block is free to receive data
|
0x00000084 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LSC.BLOCKS_SENT | Number of blocks sent by the core
|
0x00000086 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LSC.BLOCK_READY_MASK | '1' if block is ready to be sent
|
0x00000086 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LSC.BLOCK_USED_MASK | '1' if block is used
|
0x00000086 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LSC.CORE_STATUS | Core status
|
0x00000083 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LSC.EVENTS_SENT | Number of events sent by the core
|
0x0000008b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LSC.EXPERT | For expert
|
0x00000081 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LSC.FSM_CLOSE | FED state machine: 'close the block'
|
0x00000081 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LSC.FSM_IDLE | FED state machine: 'idle'
|
0x00000081 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LSC.FSM_READ | FED state machine: 'read data from FED'
|
0x00000086 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LSC.INITIALIZED | '1' indicates the core is initialized
|
0x00000081 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LSC.LINK_Status | SFP0 DAQ sender core status register 0
|
0x00000081 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LSC.LINK_UP | '1' means link is up, '0' link is down
|
0x00000081 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LSC.NO_BACKPRESSURE | '0' means link is in backpressure
|
0x00000085 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LSC.PACKETS_RCVD | Number of packets received
|
0x00000087 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LSC.PACKETS_SENT | Packets sent count
|
0x00000088 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LSC.STATUS_BUILD | For expert: See docs for details
|
0x00000081 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LSC.TEST_MODE | '1' means link is in test mode, '0' for FED data
|
0x0000008a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LSC.VERSION | Core version
|
0x00000082 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.LSC.WORDS_SENT | Number of 64 bit words sent by the core
|
0x000000e4 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP0.MISMATCH_COUNT | AMC evn/bcn/orn mismatch count
|
0x000000e9 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.CRC_ERR_COUNT | AMC CRC error
|
0x00000e2d |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.EVENTS_BUILT | AMC Events built
|
0x000000e1 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LENGTH_ERRORS | AMC Length error count
|
0x000000ed |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LSC.BACKP_COUNTER_HI | Number of clocks in the LinkFull state
|
0x00000099 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LSC.BACKP_COUNTER_LO | Number of clocks in the LinkFull state
|
0x00000091 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LSC.BLOCKS_FREE | '1' at least one block is free to receive data
|
0x00000094 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LSC.BLOCKS_SENT | Number of blocks sent by the core
|
0x00000096 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LSC.BLOCK_READY_MASK | '1' if block is ready to be sent
|
0x00000096 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LSC.BLOCK_USED_MASK | '1' if block is used
|
0x00000096 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LSC.CORE_STATUS | Core status
|
0x00000093 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LSC.EVENTS_SENT | Number of events sent by the core
|
0x0000009b |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LSC.EXPERT | For expert
|
0x00000091 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LSC.FSM_CLOSE | FED state machine: 'close the block'
|
0x00000091 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LSC.FSM_IDLE | FED state machine: 'idle'
|
0x00000091 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LSC.FSM_READ | FED state machine: 'read data from FED'
|
0x00000096 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LSC.INITIALIZED | '1' indicates the core is initialized
|
0x00000091 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LSC.LINK_Status | DAQ sender core status register 0
|
0x00000091 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LSC.LINK_UP | '1' means link is up, '0' link is down
|
0x00000091 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LSC.NO_BACKPRESSURE | '0' means link is in backpressure
|
0x00000095 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LSC.PACKETS_RCVD | Number of packets received
|
0x00000097 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LSC.PACKETS_SENT | Packets sent count
|
0x00000098 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LSC.STATUS_BUILD | For expert: See docs for details
|
0x00000091 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LSC.TEST_MODE | '1' means link is in test mode, '0' for FED data
|
0x0000009a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LSC.VERSION | Core version
|
0x00000092 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.LSC.WORDS_SENT | Number of 64 bit words sent by the core
|
0x000000e5 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP1.MISMATCH_COUNT | AMC evn/bcn/orn mismatch count
|
0x000000ea |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.CRC_ERR_COUNT | AMC CRC error
|
0x00000e2e |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.EVENTS_BUILT | AMC Events built
|
0x000000e2 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LENGTH_ERRORS | AMC Length error count
|
0x000000ee |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LSC.BACKP_COUNTER_HI | Number of clocks in the LinkFull state
|
0x000000a9 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LSC.BACKP_COUNTER_LO | Number of clocks in the LinkFull state
|
0x000000a1 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LSC.BLOCKS_FREE | '1' at least one block is free to receive data
|
0x000000a4 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LSC.BLOCKS_SENT | Number of blocks sent by the core
|
0x000000a6 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LSC.BLOCK_READY_MASK | '1' if block is ready to be sent
|
0x000000a6 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LSC.BLOCK_USED_MASK | '1' if block is used
|
0x000000a6 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LSC.CORE_STATUS | Core status
|
0x000000a3 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LSC.EVENTS_SENT | Number of events sent by the core
|
0x000000ab |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LSC.EXPERT | For expert
|
0x000000a1 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LSC.FSM_CLOSE | FED state machine: 'close the block'
|
0x000000a1 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LSC.FSM_IDLE | FED state machine: 'idle'
|
0x000000a1 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LSC.FSM_READ | FED state machine: 'read data from FED'
|
0x000000a6 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LSC.INITIALIZED | '1' indicates the core is initialized
|
0x000000a1 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LSC.LINK_Status | DAQ sender core status register 0
|
0x000000a1 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LSC.LINK_UP | '1' means link is up, '0' link is down
|
0x000000a1 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LSC.NO_BACKPRESSURE | '0' means link is in backpressure
|
0x000000a5 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LSC.PACKETS_RCVD | Number of packets received
|
0x000000a7 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LSC.PACKETS_SENT | Packets sent count
|
0x000000a8 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LSC.STATUS_BUILD | For expert: See docs for details
|
0x000000a1 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LSC.TEST_MODE | '1' means link is in test mode, '0' for FED data
|
0x000000aa |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LSC.VERSION | Core version
|
0x000000a2 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.LSC.WORDS_SENT | Number of 64 bit words sent by the core
|
0x000000e6 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP2.MISMATCH_COUNT | AMC evn/bcn/orn mismatch count
|
0x00000004 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.SFP_ABSENT_MASK | '1' indicates SFP0..2 absent
|
0x00000004 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.TTS_LOS_LOL | '1' indicates TTC_LOS or TTC_LOL
|
0x00000004 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.TTS_SFP_ABSENT | '1' indicates TTC/TTS SFP absent
|
0x00000004 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.TTS_TX_FAULT | '1' indicates TTS TxFault
|
0x00000004 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP.TX_FAULT_MASK | '1' indicates SFP0..2 TxFault
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000010 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP0.DATA_READY_MASK | event data ready in event buffer of event builders
|
0x00000010 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP0.DDR3_WRITE_PORT_FULL | ddr3 event data write port input FIFO full
|
0x00000010 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP0.DDR3_WRITE_PORT_READY_MASK | ddr3 event data write port ready
|
0x00000010 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP0.EVENT_SIZE_MASK | event size in event buffer of event builders
|
0x00000100 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP0.ROM | SFP0 ROM data(first 128 bytes, little endian)
|
0x00000004 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP0.RX_SIG_LOST_MASK | '1' indicates SFP0..2 Receiver signal lost
|
0x00000004 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP0.SFP_ABSENT_MASK | '1' indicates SFP0..2 absent
|
0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP0.SFP_LSC_DOWN_MASK | '1' when DAQLSC of SFP0..2 is down
|
0x00000004 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP0.TX_FAULT_MASK | '1' indicates SFP0..2 TxFault
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000010 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP1.DATA_READY_MASK | event data ready in event buffer of event builders
|
0x00000010 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP1.DDR3_WRITE_PORT_FULL | ddr3 event data write port input FIFO full
|
0x00000010 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP1.DDR3_WRITE_PORT_READY_MASK | ddr3 event data write port ready
|
0x00000010 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP1.EVENT_SIZE_MASK | event size in event buffer of event builders
|
0x00000120 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP1.ROM | SFP1 ROM data(first 128 bytes, little endian)
|
0x00000004 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP1.RX_SIG_LOST_MASK | '1' indicates SFP0..2 Receiver signal lost
|
0x00000004 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP1.SFP_ABSENT_MASK | '1' indicates SFP0..2 absent
|
0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP1.SFP_LSC_DOWN_MASK | '1' when DAQLSC of SFP0..2 is down
|
0x00000004 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP1.TX_FAULT_MASK | '1' indicates SFP0..2 TxFault
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000010 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP2.DATA_READY_MASK | event data ready in event buffer of event builders
|
0x00000010 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP2.DDR3_WRITE_PORT_FULL | ddr3 event data write port input FIFO full
|
0x00000010 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP2.DDR3_WRITE_PORT_READY_MASK | ddr3 event data write port ready
|
0x00000010 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP2.EVENT_SIZE_MASK | event size in event buffer of event builders
|
0x00000140 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP2.ROM | SFP2 ROM data(first 128 bytes, little endian)
|
0x00000004 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP2.RX_SIG_LOST_MASK | '1' indicates SFP0..2 Receiver signal lost
|
0x00000004 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP2.SFP_ABSENT_MASK | '1' indicates SFP0..2 absent
|
0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP2.SFP_LSC_DOWN_MASK | '1' when DAQLSC of SFP0..2 is down
|
0x00000004 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP2.TX_FAULT_MASK | '1' indicates SFP0..2 TxFault
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000003 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.SFP_LSC_DOWN_MASK | '1' when DAQLSC of SFP0..2 is down
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
---|
0x00000019 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.T1_TTS_STATE | Current T1 overall TTS state
|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 09 | 08 | 07 | 06 | 05 | 04 | 03 | 02 | 01 | 00 | |
|
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0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.TTC.BCNT_ERROR | TTC bcnt error
|
0x00000045 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.TTC.BCNT_ERRORS_HI |
|
0x00000044 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.TTC.BCNT_ERRORS_LO | TTC BC0 error counter
|
0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.TTC.MULT_BIT_ERROR | TTC multi-bit error
|
0x00000043 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.TTC.MULT_BIT_ERRORS_HI |
|
0x00000042 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.TTC.MULT_BIT_ERRORS_LO | TTC multi-bit error counter
|
0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.TTC.NOT_READY | TTC not ready
|
0x0000001a |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.TTC.RESYNC_COUNT.OBSOLETE | Count of TTC resync commands received (obsolete)
|
0x00000059 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.TTC.RESYNC_COUNT_HI |
|
0x00000058 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.TTC.RESYNC_COUNT_LO | Count of TTC resync commands received
|
0x00000160 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.TTC.ROM | TTC/TTS SFP ROM data(first 128 bytes, little endian)
|
0x00000000 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.TTC.SGL_BIT_ERROR | TTC single bit error
|
0x00000041 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.TTC.SGL_BIT_ERRORS_HI |
|
0x00000040 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STATUS.TTC.SGL_BIT_ERRORS_LO | TTC single bit error counter
|