CMDCNTR
=======

C0 : INIT
C1 : nCLRMEM
C2 : INPUT_RDY
C3 : nCLRBUSY

VMEMCCM
=======

V0 : UART_DTACK
V1 : UART_BUSGRT
V2 : UART_RDREQ
V3 : UART_WRREQ
V4 : UART_nRD
V5 : UART_nWR

STATUS HANDLER
==============

E0 : CHK_ENB
E1 : DEV_DS
E2 : CHK_ERR
E3 : DATA14
E4 : DATA15
E5 : MRC_ERR2


MEM:

TP0: DCLK
TP1: DATA0
TP2: 16CLK
TP3: CMD_IN
TP4: SH
TP5: LD

L2HOTHEAD

	TP7 = sm == SM_RUN;
	TP6 = sm == SM_REFRAME;
	TP5 = nINIT_SYNC;
	TP4 = REFRAME;
	TP3 = EVREADY;
	TP2 = SCnD;
	TP1 = nENA;
	TP0 = EF;


FASTCONT:

F7: nACCREJ
F6: 2MANY	: Data0
F5: NO_DS_L2 	: data1
F4: TP0		: data2
F3: DO_L2
F2: DO_L3
F1: WAIT_L3
F0: CLKFF

L3_MESSAGE:

TP0: bdata0
TP1: bdata1
TP2: nds
TP3: do_l3
TP4: cntmcen_clk
TP5: head_chk (incoming check result)
TP6: doing_l3
TP7: chk_enb (check enable)

TIMING

TP0: bc0
TP1: bc1
TP2: bcff0
TP3: bcff1
TP4: cmp_l2
TP5: sync_err
TP6: nMRC_STR
TP7: FF_nOE