Last Mod date: 110502

ETM

Release 7
* 110502 we now read constantly all fifos during init
* 110602 fixed handling of error bit in l3message (now it does not add to the count)
* 110602 INIT now clears the state machine, counters and other registers
* INIT circuitry has been synchronized with clock so that what happens at the end of init
  is very well defined.

Release 6:
* 091102 changed timing of bc_clock, making it closer to 50% duty cycle.